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authorAlistair Francis2020-12-04 17:47:37 +0100
committerAlistair Francis2020-12-18 06:56:43 +0100
commit54a581c22831098e53552d7e33024dc9f4193d7f (patch)
treed26900305e4ba8012baea8bb4ffbe3d6afa5aa4d /hw/intc
parenttarget/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR (diff)
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intc/ibex_plic: Clear interrupts that occur during claim process
Previously if an interrupt occured during the claim process (after the interrupt is claimed but before it's completed) it would never be cleared. This patch ensures that we also clear the hidden_pending bits as well. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Tested-by: Jackie Ke <jackieke724@hotmail.com> Message-id: 4e9786084a86f220689123cc8a7837af8fa071cf.1607100423.git.alistair.francis@wdc.com
Diffstat (limited to 'hw/intc')
-rw-r--r--hw/intc/ibex_plic.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/hw/intc/ibex_plic.c b/hw/intc/ibex_plic.c
index 341c9db405..c1b72fcab0 100644
--- a/hw/intc/ibex_plic.c
+++ b/hw/intc/ibex_plic.c
@@ -43,16 +43,23 @@ static void ibex_plic_irqs_set_pending(IbexPlicState *s, int irq, bool level)
{
int pending_num = irq / 32;
+ if (!level) {
+ /*
+ * If the level is low make sure we clear the hidden_pending.
+ */
+ s->hidden_pending[pending_num] &= ~(1 << (irq % 32));
+ }
+
if (s->claimed[pending_num] & 1 << (irq % 32)) {
/*
* The interrupt has been claimed, but not completed.
* The pending bit can't be set.
+ * Save the pending level for after the interrupt is completed.
*/
s->hidden_pending[pending_num] |= level << (irq % 32);
- return;
+ } else {
+ s->pending[pending_num] |= level << (irq % 32);
}
-
- s->pending[pending_num] |= level << (irq % 32);
}
static bool ibex_plic_irqs_pending(IbexPlicState *s, uint32_t context)