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spice_video_codecs
Experimental fork of QEMU with video encoding patches
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riscv
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opentitan.h
Commit message (
Expand
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Author
Age
Files
Lines
*
hw/riscv: opentitan: Expose the resetvec as a SoC property
Alistair Francis
2022-09-26
1
-0
/
+2
*
hw/riscv: opentitan: bump opentitan version
Wilfred Mallawa
2022-09-07
1
-5
/
+6
*
riscv: opentitan: Connect opentitan SPI Host
Wilfred Mallawa
2022-04-22
1
-9
/
+21
*
hw: riscv: opentitan: fixup SPI addresses
Wilfred Mallawa
2022-03-03
1
-1
/
+3
*
hw/riscv: opentitan: Update to the latest build
Alistair Francis
2021-10-22
1
-3
/
+3
*
hw/riscv: opentitan: Add the flash alias
Alistair Francis
2021-07-15
1
-0
/
+2
*
hw/riscv: opentitan: Add the unimplement rv_core_ibex_peri
Alistair Francis
2021-07-15
1
-0
/
+1
*
hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer
Alistair Francis
2021-06-24
1
-1
/
+4
*
hw/opentitan: Update the interrupt layout
Alistair Francis
2021-05-11
1
-8
/
+8
*
riscv/opentitan: Update the OpenTitan memory layout
Alistair Francis
2020-12-18
1
-6
/
+17
*
Use OBJECT_DECLARE_SIMPLE_TYPE when possible
Eduardo Habkost
2020-09-18
1
-3
/
+1
*
Use DECLARE_*CHECKER* macros
Eduardo Habkost
2020-09-09
1
-2
/
+2
*
Move QOM typedefs and add missing includes
Eduardo Habkost
2020-09-09
1
-2
/
+4
*
opentitan: Rename memmap enum constants
Eduardo Habkost
2020-08-27
1
-19
/
+19
*
riscv/opentitan: Connect the UART device
Alistair Francis
2020-06-19
1
-0
/
+13
*
riscv/opentitan: Connect the PLIC device
Alistair Francis
2020-06-19
1
-0
/
+3
*
riscv: Initial commit of OpenTitan machine
Alistair Francis
2020-06-03
1
-0
/
+68