| Commit message (Expand) | Author | Age | Files | Lines |
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| * | | sifive_u: Rename memmap enum constants | Eduardo Habkost | 2020-09-18 | 1 | -17/+17 |
| * | | sifive_e: Rename memmap enum constants | Eduardo Habkost | 2020-09-18 | 1 | -19/+19 |
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* / | hw/i386/vmport: Drop superfluous parenthesis around function typedef | Philippe Mathieu-Daudé | 2020-09-18 | 1 | -1/+1 |
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* | x86: move cpu hotplug from pc to x86 | Gerd Hoffmann | 2020-09-17 | 1 | -0/+10 |
* | x86: move acpi_dev from pc/microvm | Gerd Hoffmann | 2020-09-17 | 3 | -2/+1 |
* | x86: constify x86_machine_is_*_enabled | Gerd Hoffmann | 2020-09-17 | 1 | -2/+2 |
* | microvm/acpi: add minimal acpi support | Gerd Hoffmann | 2020-09-17 | 1 | -0/+9 |
* | microvm: make virtio irq base runtime configurable | Gerd Hoffmann | 2020-09-17 | 1 | -1/+1 |
* | acpi: move acpi_dsdt_add_power_button() to ged | Gerd Hoffmann | 2020-09-17 | 1 | -0/+1 |
* | acpi: ged: add x86 device variant. | Gerd Hoffmann | 2020-09-17 | 1 | -0/+4 |
* | acpi: ged: add control regs | Gerd Hoffmann | 2020-09-17 | 1 | -0/+12 |
* | virtio-gpu: make virtio_gpu_ops static | Gerd Hoffmann | 2020-09-15 | 1 | -2/+1 |
* | hw/arm/npcm7xx: add board setup stub for CPU and UART clocks | Havard Skinnemoen | 2020-09-14 | 1 | -0/+1 |
* | hw/ssi: NPCM7xx Flash Interface Unit device model | Havard Skinnemoen | 2020-09-14 | 2 | -0/+75 |
* | hw/mem: Stubbed out NPCM7xx Memory Controller model | Havard Skinnemoen | 2020-09-14 | 2 | -0/+38 |
* | hw/nvram: NPCM7xx OTP device model | Havard Skinnemoen | 2020-09-14 | 2 | -0/+82 |
* | hw/arm: Add two NPCM7xx-based machines | Havard Skinnemoen | 2020-09-14 | 1 | -0/+19 |
* | hw/arm: Add NPCM730 and NPCM750 SoC models | Havard Skinnemoen | 2020-09-14 | 1 | -0/+85 |
* | hw/timer: Add NPCM7xx Timer device model | Havard Skinnemoen | 2020-09-14 | 1 | -0/+78 |
* | hw/misc: Add NPCM7xx Clock Controller device model | Havard Skinnemoen | 2020-09-14 | 1 | -0/+48 |
* | hw/misc: Add NPCM7xx System Global Control Registers device model | Havard Skinnemoen | 2020-09-14 | 1 | -0/+43 |
* | Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200... | Peter Maydell | 2020-09-13 | 17 | -86/+319 |
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| * | hw/riscv: Move sifive_test model to hw/misc | Bin Meng | 2020-09-10 | 1 | -0/+0 |
| * | hw/riscv: Move sifive_uart model to hw/char | Bin Meng | 2020-09-10 | 1 | -0/+0 |
| * | hw/riscv: Move riscv_htif model to hw/char | Bin Meng | 2020-09-10 | 1 | -0/+0 |
| * | hw/riscv: Move sifive_plic model to hw/intc | Bin Meng | 2020-09-10 | 1 | -81/+0 |
| * | hw/riscv: Move sifive_clint model to hw/intc | Bin Meng | 2020-09-10 | 1 | -0/+0 |
| * | hw/riscv: Move sifive_gpio model to hw/gpio | Bin Meng | 2020-09-10 | 3 | -2/+2 |
| * | hw/riscv: Move sifive_u_otp model to hw/misc | Bin Meng | 2020-09-10 | 2 | -1/+1 |
| * | hw/riscv: Move sifive_u_prci model to hw/misc | Bin Meng | 2020-09-10 | 2 | -1/+1 |
| * | hw/riscv: Move sifive_e_prci model to hw/misc | Bin Meng | 2020-09-10 | 1 | -0/+0 |
| * | hw/riscv: sifive_u: Connect a DMA controller | Bin Meng | 2020-09-10 | 1 | -0/+11 |
| * | hw/riscv: clint: Avoid using hard-coded timebase frequency | Bin Meng | 2020-09-10 | 1 | -1/+3 |
| * | hw/riscv: microchip_pfsoc: Hook GPIO controllers | Bin Meng | 2020-09-10 | 1 | -0/+3 |
| * | hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs | Bin Meng | 2020-09-10 | 1 | -0/+7 |
| * | hw/net: cadence_gem: Add a new 'phy-addr' property | Bin Meng | 2020-09-10 | 1 | -0/+2 |
| * | hw/riscv: microchip_pfsoc: Connect a DMA controller | Bin Meng | 2020-09-10 | 1 | -0/+11 |
| * | hw/dma: Add SiFive platform DMA controller emulation | Bin Meng | 2020-09-10 | 1 | -0/+57 |
| * | hw/riscv: microchip_pfsoc: Connect a Cadence SDHCI controller and an SD card | Bin Meng | 2020-09-10 | 1 | -0/+4 |
| * | hw/sd: Add Cadence SDHCI emulation | Bin Meng | 2020-09-10 | 1 | -0/+47 |
| * | hw/riscv: microchip_pfsoc: Connect 5 MMUARTs | Bin Meng | 2020-09-10 | 1 | -0/+20 |
| * | hw/char: Add Microchip PolarFire SoC MMUART emulation | Bin Meng | 2020-09-10 | 1 | -0/+61 |
| * | hw/riscv: Initial support for Microchip PolarFire SoC Icicle Kit board | Bin Meng | 2020-09-10 | 1 | -0/+88 |
| * | hw/riscv: hart: Add a new 'resetvec' property | Bin Meng | 2020-09-10 | 1 | -0/+1 |
* | | pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312 | Eduardo Habkost | 2020-09-09 | 1 | -2/+2 |
* | | sabre: Rename SABRE_DEVICE to SABRE | Eduardo Habkost | 2020-09-09 | 1 | -1/+1 |
* | | esp: Rename ESP_STATE to ESP | Eduardo Habkost | 2020-09-09 | 1 | -1/+1 |
* | | ahci: Rename ICH_AHCI to ICH9_AHCI | Eduardo Habkost | 2020-09-09 | 1 | -1/+1 |
* | | vmgenid: Rename VMGENID_DEVICE to TYPE_VMGENID | Eduardo Habkost | 2020-09-09 | 1 | -3/+3 |
* | | ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICE | Eduardo Habkost | 2020-09-09 | 1 | -2/+2 |