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path: root/target/arm/cpu.c
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* target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extensionPeter Maydell2020-10-201-0/+9
* target/arm: Fix has_vfp/has_neon ID reg squashing for M-profilePeter Maydell2020-10-201-12/+19
* hw/arm/virt: Implement kvm-steal-timeAndrew Jones2020-10-081-0/+8
* target/arm: Move id_pfr0, id_pfr1 into ARMISARegistersPeter Maydell2020-10-011-10/+10
* target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA checkPeter Maydell2020-10-011-1/+0Star
* target/arm: Set instance_align on CPUARM TypeInfoRichard Henderson2020-09-181-0/+2
* target/arm: Remove no-longer-reachable 32-bit KVM codePeter Maydell2020-09-141-60/+53Star
* target/arm: Move setting of CPU halted state to generic codeThiago Jung Bauermann2020-09-081-1/+0Star
* target/arm: Move start-powered-off property to generic CPUStateThiago Jung Bauermann2020-09-081-3/+2Star
* target/arm: Enable FP16 in '-cpu max'Peter Maydell2020-09-011-1/+2
* target/arm: Implement FPST_STD_F16 fpstatusPeter Maydell2020-08-241-0/+3
* hw/arm/virt: Enable MTE via a machine propertyRichard Henderson2020-07-201-8/+11
* target/arm: Create tagged ram when MTE is enabledRichard Henderson2020-06-261-4/+48
* target/arm: Complete TBI clearing for user-only for SVERichard Henderson2020-06-261-0/+3
* target/arm: Restrict the values of DCZID.BS under TCGRichard Henderson2020-06-261-0/+24
* target/arm: Define arm_cpu_do_unaligned_access for user-onlyRichard Henderson2020-06-261-1/+1
* target/arm: Check supported KVM features globally (not per vCPU)Philippe Mathieu-Daudé2020-06-231-1/+1
* target/arm/cpu: adjust virtual time for all KVM arm cpusfangying2020-06-161-2/+4
* qom: Drop parameter @errp of object_property_add() & friendsMarkus Armbruster2020-05-151-7/+4Star
* target/arm: Restrict TCG cpus to TCG accelPhilippe Mathieu-Daudé2020-05-111-634/+0Star
* target/arm/cpu: Restrict v8M IDAU interface to Aarch32 CPUsPhilippe Mathieu-Daudé2020-05-111-1/+1
* target/arm/cpu: Use ARRAY_SIZE() to iterate over ARMCPUInfo[]Philippe Mathieu-Daudé2020-05-111-7/+9
* target/arm: Make set_feature() available for other filesThomas Huth2020-05-111-10/+0Star
* target/arm: Use uint64_t for midr field in CPU state structPhilippe Mathieu-Daudé2020-05-041-1/+1
* target/arm: Implement ARMv8.2-TTS2UXNPeter Maydell2020-05-041-0/+1
* target/arm/cpu: Update coding style to make checkpatch.pl happyPhilippe Mathieu-Daudé2020-04-301-3/+6
* target/arm: Make cpu_register() available for other filesThomas Huth2020-04-301-8/+2Star
* Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-requ...Peter Maydell2020-03-191-4/+4
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| * cpu: Use DeviceClass reset instead of a special CPUClass resetPeter Maydell2020-03-181-4/+4
* | Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-gdbstub-1...Peter Maydell2020-03-181-3/+4
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| * target/arm: default SVE length to 64 bytes for linux-userAlex Bennée2020-03-171-3/+4
* | qom/object: Use common get/set uint helpersFelipe Franciosi2020-03-161-19/+3Star
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* target/arm: Remove EL2 and EL3 setup from user-onlyRichard Henderson2020-03-051-6/+0Star
* target/arm: Disable has_el2 and has_el3 for user-onlyRichard Henderson2020-03-051-2/+4
* target/arm: Implement (trivially) ARMv8.2-TTCNPPeter Maydell2020-03-051-0/+1
* target/arm: Remove ARM_FEATURE_VFP*Richard Henderson2020-02-281-25/+0Star
* target/arm: Replace ARM_FEATURE_VFP4 with isar_feature_aa32_simdfmacRichard Henderson2020-02-281-1/+5
* target/arm: Add isar_feature_aa64_fp_simd, isar_feature_aa32_vfpRichard Henderson2020-02-281-3/+6
* target/arm: Add isar_feature_aa32_vfp_simdRichard Henderson2020-02-281-2/+2
* target/arm: Set MVFR0.FPSP for ARMv5 cpusRichard Henderson2020-02-211-4/+6
* target/arm: Use isar_feature_aa32_simd_r32 more placesRichard Henderson2020-02-211-5/+4Star
* target/arm: Correctly implement ACTLR2, HACTLR2Peter Maydell2020-02-211-0/+1
* target/arm: Test correct register in aa32_pan and aa32_ats1e1 checksPeter Maydell2020-02-211-52/+52
* target/arm: Move DBGDIDR into ARMISARegistersPeter Maydell2020-02-211-4/+4
* target/arm: Add _aa64_ and _any_ versions of pmu_8_1 isar checksPeter Maydell2020-02-211-1/+2
* target/arm: Define an aa32_pmu_8_1 isar feature test functionPeter Maydell2020-02-211-14/+14
* target/arm: Use FIELD macros for clearing ID_DFR0 PERFMON fieldPeter Maydell2020-02-211-1/+1
* target/arm: Add and use FIELD definitions for ID_AA64DFR0_EL1Peter Maydell2020-02-211-1/+1
* target/arm: Add _aa32_ to isar_feature functions testing 32-bit ID registersPeter Maydell2020-02-211-2/+4
* target/arm: Enable ARMv8.2-ATS1E1 in -cpu maxRichard Henderson2020-02-131-0/+4
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