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path: root/target/arm/helper.c
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* target/arm: Do hflags rebuild in cpsr_write()Peter Maydell2021-08-261-0/+5
* target/arm: Implement HSTR.TJDBXPeter Maydell2021-08-261-0/+17
* target/arm: Implement HSTR.TTEEPeter Maydell2021-08-261-2/+16
* target/arm: Implement M-profile trapping on division by zeroPeter Maydell2021-08-251-2/+17
* target/arm: Re-indent sdiv and udiv helpersPeter Maydell2021-08-251-6/+9
* target/arm: Export aarch64_sve_zcr_get_valid_lenRichard Henderson2021-07-271-2/+2
* target/arm: Correctly bound length in sve_zcr_get_valid_lenRichard Henderson2021-07-271-1/+3
* target/arm: Fix offsets for TTBCRRichard Henderson2021-07-181-4/+7
* target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRinthnick@vmware.com2021-07-091-3/+13
* target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2Richard Henderson2021-05-251-2/+1Star
* target/arm: Add support for FEAT_TLBIOSRebecca Cran2021-05-251-0/+43
* target/arm: Add support for FEAT_TLBIRANGERebecca Cran2021-05-251-0/+281
* target/arm: Fix tlbbits calculation in tlbi_aa64_vae2is_write()Peter Maydell2021-05-101-1/+1
* target/arm: Add ALIGN_MEM to TBFLAG_ANYRichard Henderson2021-04-301-2/+17
* target/arm: Move mode specific TB flags to tb->cs_baseRichard Henderson2021-04-301-4/+6
* target/arm: Introduce CPUARMTBFlagsRichard Henderson2021-04-301-22/+26
* target/arm: Add wrapper macros for accessing tbflagsRichard Henderson2021-04-301-46/+39Star
* target/arm: Rename TBFLAG_ANY, PSTATE_SSRichard Henderson2021-04-301-2/+2
* target/arm: Rename TBFLAG_A32, SCTLR_BRichard Henderson2021-04-301-1/+1
* Revert "target/arm: Make number of counters in PMCR follow the CPU"Peter Maydell2021-04-061-17/+12Star
* target/arm: Make number of counters in PMCR follow the CPUPeter Maydell2021-03-301-12/+17
* semihosting: Move include/hw/semihosting/ -> include/semihosting/Philippe Mathieu-Daudé2021-03-101-2/+2
* target/arm: Use TCF0 and TFSRE0 for unprivileged tag checksPeter Collingbourne2021-03-051-1/+1
* target/arm: Add support for FEAT_SSBS, Speculative Store Bypass SafeRebecca Cran2021-03-051-0/+37
* target/arm: Correctly initialize MDCR_EL2.HPMNDaniel Müller2021-02-111-5/+4Star
* target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstateRebecca Cran2021-02-111-6/+18
* target/arm: Add support for FEAT_DIT, Data Independent TimingRebecca Cran2021-02-111-0/+22
* target/arm: Fix SCR RES1 handlingMike Nawrocki2021-02-111-2/+14
* target/arm: do not use cc->do_interrupt for KVM directlyClaudio Fontana2021-02-051-0/+4
* target/arm: Replace magic value by MMU_DATA_LOAD definitionPhilippe Mathieu-Daudé2021-01-291-1/+1
* target/arm: Conditionalize DBGDIDRRichard Henderson2021-01-291-6/+15
* target/arm: Implement ID_PFR2Richard Henderson2021-01-291-2/+2
* target/arm: refactor vae1_tlbmask()Rémi Denis-Courmont2021-01-191-14/+11Star
* target/arm: Implement SCR_EL2.EEL2Rémi Denis-Courmont2021-01-191-3/+16
* target/arm: set HPFAR_EL2.NS on secure stage 2 faultsRémi Denis-Courmont2021-01-191-0/+6
* target/arm: secure stage 2 translation regimeRémi Denis-Courmont2021-01-191-24/+54
* target/arm: generalize 2-stage page-walk conditionRémi Denis-Courmont2021-01-191-7/+6Star
* target/arm: translate NS bit in page-walksRémi Denis-Courmont2021-01-191-0/+12
* target/arm: do S1_ptw_translate() before address space lookupRémi Denis-Courmont2021-01-191-3/+6
* target/arm: handle VMID change in secure stateRémi Denis-Courmont2021-01-191-4/+9
* target/arm: add ARMv8.4-SEL2 system registersRémi Denis-Courmont2021-01-191-0/+24
* target/arm: add MMU stage 1 for Secure EL2Rémi Denis-Courmont2021-01-191-43/+84
* target/arm: add 64-bit S-EL2 to EL exception tableRémi Denis-Courmont2021-01-191-5/+5
* target/arm: factor MDCR_EL2 common handlingRémi Denis-Courmont2021-01-191-16/+22
* target/arm: use arm_hcr_el2_eff() where applicableRémi Denis-Courmont2021-01-191-13/+18
* target/arm: use arm_is_el2_enabled() where applicableRémi Denis-Courmont2021-01-191-20/+13Star
* target/arm: remove redundant testsRémi Denis-Courmont2021-01-191-6/+4Star
* semihosting: Change common-semi API to be architecture-independentKeith Packard2021-01-181-2/+3
* target/arm: use official org.gnu.gdb.aarch64.sve layout for registersAlex Bennée2021-01-181-1/+1
* target/arm: ARMv8.4-TTST extensionRémi Denis-Courmont2021-01-121-2/+13
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