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* arm: force flag recalculation when messing with DAIFAlex Bennée2022-02-081-0/+2
* arm: tcg: Adhere to SMCCC 1.3 section 5.2Peter Maydell2022-02-081-29/+6Star
* target/arm: make psci-conduit settable after realizePeter Maydell2022-02-081-1/+5
* target/arm: Use CPTR_TFP with CPTR_EL3 in fp_exception_elRichard Henderson2022-02-081-1/+1
* target/arm: Fix {fp, sve}_exception_el for VHE mode runningRichard Henderson2022-02-081-17/+60
* target/arm: Tidy sve_exception_el for CPACR_EL1 accessRichard Henderson2022-02-081-19/+17Star
* target/arm: Fix sve_zcr_len_for_el for VHE mode runningRichard Henderson2022-02-081-1/+2
* target/arm: Use correct entrypoint for SVC taken from Hyp to HypPeter Maydell2022-01-281-2/+2
* target/arm: Log CPU index in 'Taking exception' logPeter Maydell2022-01-283-5/+8
* hw/arm/virt: KVM: Enable PAuth when supported by the hostMarc Zyngier2022-01-204-15/+54
* exec/memop: Adding signedness to quad definitionsFrédéric Pétrot2022-01-087-23/+23
* target/arm: Add missing FEAT_TLBIOS instructionsIdan Horowitz2022-01-071-0/+32
* target/arm: Correct calculation of tlb range invalidate lengthPeter Maydell2021-12-151-3/+3
* target/arm: Suppress bp for exceptions with more priorityRichard Henderson2021-12-151-0/+23
* target/arm: Assert thumb pc is alignedRichard Henderson2021-12-153-2/+20
* target/arm: Take an exception if PC is misalignedRichard Henderson2021-12-155-1/+60
* target/arm: Split compute_fsr_fsc out of arm_deliver_faultRichard Henderson2021-12-151-17/+28
* target/arm: Advance pc for arch single-step exceptionRichard Henderson2021-12-151-0/+1
* target/arm: Split arm_pre_translate_insnRichard Henderson2021-12-151-3/+7
* target/arm: Hoist pc_next to a local variable in thumb_tr_translate_insnRichard Henderson2021-12-151-8/+8
* target/arm: Hoist pc_next to a local variable in arm_tr_translate_insnRichard Henderson2021-12-151-4/+5
* target/arm: Hoist pc_next to a local variable in aarch64_tr_translate_insnRichard Henderson2021-12-151-3/+4
* Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2"Peter Maydell2021-11-221-6/+29
* Merge remote-tracking branch 'remotes/rth/tags/pull-arm-20211102-2' into stagingRichard Henderson2021-11-035-28/+51
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| * hvf: arm: Ignore cache operations on MMIOAlexander Graf2021-11-021-0/+7
| * target/arm: Use tcg_constant_i32() in gen_rev16()Philippe Mathieu-Daudé2021-11-021-2/+1Star
| * target/arm: Use tcg_constant_i64() in do_sat_addsub_64()Philippe Mathieu-Daudé2021-11-021-9/+8Star
| * target/arm: Use the constant variant of store_cpu_field() when possiblePhilippe Mathieu-Daudé2021-11-021-15/+6Star
| * target/arm: Introduce store_cpu_field_constant() helperPhilippe Mathieu-Daudé2021-11-021-0/+3
| * target/arm: Use tcg_constant_i32() in op_smlad()Philippe Mathieu-Daudé2021-11-021-2/+1Star
| * target/arm: Advertise MVE to gdb when presentPeter Maydell2021-11-021-0/+25
* | target/arm: Implement arm_cpu_record_sigbusRichard Henderson2021-11-024-0/+10
* | target/arm: Implement arm_cpu_record_sigsegvRichard Henderson2021-11-024-21/+33
* | target/arm: Use cpu_loop_exit_sigsegv for mte tag lookupRichard Henderson2021-11-021-4/+2Star
* | target/arm: Fixup comment re handle_cpu_signalRichard Henderson2021-11-021-1/+1
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* target/arm: Drop checks for singlestep_enabledRichard Henderson2021-10-162-38/+8Star
* target/arm: Use cpu_*_mmu instead of helper_*_mmuRichard Henderson2021-10-132-47/+11Star
* accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.hRichard Henderson2021-10-131-1/+0Star
* target/arm: Use MO_128 for 16 byte atomicsRichard Henderson2021-10-131-4/+4
* tcg: Rename TCGMemOpIdx to MemOpIdxRichard Henderson2021-10-062-9/+9
* tcg: Expand MO_SIZE to 3 bitsRichard Henderson2021-10-061-1/+1
* Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210930'...Peter Maydell2021-09-305-291/+307
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| * target/arm: Don't put FPEXC and FPSID in org.gnu.gdb.arm.vfp XMLPeter Maydell2021-09-301-16/+40
| * target/arm: Move gdbstub related code out of helper.cPeter Maydell2021-09-304-271/+277
| * target/arm: Fix coding style issues in gdbstub code in helper.cPeter Maydell2021-09-301-7/+16
| * arm: tcg: Adhere to SMCCC 1.3 section 5.2Alexander Graf2021-09-301-29/+6Star
* | memory: Name all the memory listenersPeter Xu2021-09-301-0/+1
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* hw/core: Make do_unaligned_access noreturnRichard Henderson2021-09-221-1/+1
* include/exec: Move cpu_signal_handler declarationRichard Henderson2021-09-221-7/+0Star
* target/arm: Optimize MVE 1op-immediate insnsPeter Maydell2021-09-211-5/+21
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