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spice_video_codecs
Experimental fork of QEMU with video encoding patches
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arm
Commit message (
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Author
Age
Files
Lines
...
*
cpu: Move cpu_exec_* to tcg_ops
Eduardo Habkost
2021-02-05
3
-3
/
+11
*
cpu: Move synchronize_from_tb() to tcg_ops
Eduardo Habkost
2021-02-05
1
-1
/
+3
*
cpu: Introduce TCGCpuOperations struct
Eduardo Habkost
2021-02-05
1
-1
/
+1
*
target/arm: Replace magic value by MMU_DATA_LOAD definition
Philippe Mathieu-Daudé
2021-01-29
1
-1
/
+1
*
target/arm: Conditionalize DBGDIDR
Richard Henderson
2021-01-29
1
-6
/
+15
*
target/arm: Implement ID_PFR2
Richard Henderson
2021-01-29
3
-2
/
+5
*
target/arm/m_helper: Silence GCC 10 maybe-uninitialized error
Philippe Mathieu-Daudé
2021-01-19
1
-1
/
+1
*
target/arm: Update REV, PUNPK for pred_desc
Richard Henderson
2021-01-19
2
-13
/
+8
*
target/arm: Update ZIP, UZP, TRN for pred_desc
Richard Henderson
2021-01-19
2
-17
/
+13
*
target/arm: Update PFIRST, PNEXT for pred_desc
Richard Henderson
2021-01-19
2
-6
/
+7
*
target/arm: Introduce PREDDESC field definitions
Richard Henderson
2021-01-19
1
-0
/
+9
*
target/arm: refactor vae1_tlbmask()
Rémi Denis-Courmont
2021-01-19
1
-14
/
+11
*
target/arm: enable Secure EL2 in max CPU
Rémi Denis-Courmont
2021-01-19
1
-0
/
+1
*
target/arm: Implement SCR_EL2.EEL2
Rémi Denis-Courmont
2021-01-19
4
-8
/
+36
*
target/arm: revector to run-time pick target EL
Rémi Denis-Courmont
2021-01-19
1
-2
/
+21
*
target/arm: set HPFAR_EL2.NS on secure stage 2 faults
Rémi Denis-Courmont
2021-01-19
4
-0
/
+13
*
target/arm: secure stage 2 translation regime
Rémi Denis-Courmont
2021-01-19
3
-25
/
+81
*
target/arm: generalize 2-stage page-walk condition
Rémi Denis-Courmont
2021-01-19
1
-7
/
+6
*
target/arm: translate NS bit in page-walks
Rémi Denis-Courmont
2021-01-19
1
-0
/
+12
*
target/arm: do S1_ptw_translate() before address space lookup
Rémi Denis-Courmont
2021-01-19
1
-3
/
+6
*
target/arm: handle VMID change in secure state
Rémi Denis-Courmont
2021-01-19
1
-4
/
+9
*
target/arm: add ARMv8.4-SEL2 system registers
Rémi Denis-Courmont
2021-01-19
2
-0
/
+31
*
target/arm: add MMU stage 1 for Secure EL2
Rémi Denis-Courmont
2021-01-19
5
-58
/
+124
*
target/arm: add 64-bit S-EL2 to EL exception table
Rémi Denis-Courmont
2021-01-19
2
-7
/
+7
*
target/arm: Define isar_feature function to test for presence of SEL2
Rémi Denis-Courmont
2021-01-19
1
-0
/
+5
*
target/arm: factor MDCR_EL2 common handling
Rémi Denis-Courmont
2021-01-19
1
-16
/
+22
*
target/arm: use arm_hcr_el2_eff() where applicable
Rémi Denis-Courmont
2021-01-19
1
-13
/
+18
*
target/arm: use arm_is_el2_enabled() where applicable
Rémi Denis-Courmont
2021-01-19
3
-29
/
+16
*
target/arm: add arm_is_el2_enabled() helper
Rémi Denis-Courmont
2021-01-19
1
-0
/
+17
*
target/arm: remove redundant tests
Rémi Denis-Courmont
2021-01-19
2
-10
/
+8
*
target/arm: Use object_property_add_bool for "sve" property
Richard Henderson
2021-01-19
1
-14
/
+10
*
target/arm: Add cpu properties to control pauth
Richard Henderson
2021-01-19
4
-4
/
+60
*
target/arm: Implement an IMPDEF pauth algorithm
Richard Henderson
2021-01-19
2
-9
/
+33
*
semihosting: Change common-semi API to be architecture-independent
Keith Packard
2021-01-18
3
-11
/
+9
*
semihosting: Move ARM semihosting code to shared directories
Keith Packard
2021-01-18
2
-1123
/
+0
*
target/arm: use official org.gnu.gdb.aarch64.sve layout for registers
Alex Bennée
2021-01-18
2
-47
/
+30
*
gdbstub: drop CPUEnv from gdb_exit()
Alex Bennée
2021-01-18
1
-1
/
+1
*
target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns
Peter Maydell
2021-01-12
1
-0
/
+7
*
target/arm: add aarch32 ID register fields to cpu.h
Leif Lindholm
2021-01-12
1
-0
/
+28
*
target/arm: add aarch64 ID register fields to cpu.h
Leif Lindholm
2021-01-12
1
-0
/
+15
*
target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h
Leif Lindholm
2021-01-12
1
-0
/
+31
*
target/arm: make ARMCPU.ctr 64-bit
Leif Lindholm
2021-01-12
1
-1
/
+1
*
target/arm: make ARMCPU.clidr 64-bit
Leif Lindholm
2021-01-12
1
-1
/
+1
*
target/arm: fix typo in cpu.h ID_AA64PFR1 field name
Leif Lindholm
2021-01-12
1
-1
/
+1
*
target/arm: enable Small Translation tables in max CPU
Rémi Denis-Courmont
2021-01-12
1
-0
/
+1
*
target/arm: ARMv8.4-TTST extension
Rémi Denis-Courmont
2021-01-12
2
-2
/
+18
*
target/arm: Remove timer_del()/timer_deinit() before timer_free()
Peter Maydell
2021-01-08
1
-2
/
+0
*
target/arm: Implement Cortex-M55 model
Peter Maydell
2021-01-08
1
-0
/
+42
*
target/arm: Implement FPCXT_NS fp system register
Peter Maydell
2021-01-08
1
-3
/
+99
*
target/arm: Correct store of FPSCR value via FPCXT_S
Peter Maydell
2021-01-08
1
-6
/
+6
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