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* target/microblaze: Add props enabling exceptions on failed bus accessesEdgar E. Iglesias2019-01-222-1/+13
* target/microblaze: Switch to transaction_failed hookPeter Maydell2019-01-223-14/+17
* target-microblaze: Rework NOP/zero instruction handlingEdgar E. Iglesias2018-06-151-11/+4Star
* target-microblaze: mmu: Correct masking of output addressesEdgar E. Iglesias2018-06-151-1/+0Star
* tcg: Pass tb and index to tcg_gen_exit_tb separatelyRichard Henderson2018-06-021-3/+3
* target-microblaze: Consolidate MMU enabled checksEdgar E. Iglesias2018-05-292-4/+6
* target-microblaze: cpu_mmu_index: Fixup indentationEdgar E. Iglesias2018-05-291-7/+9
* target-microblaze: Use tcg_gen_movcond in eval_cond_jmpEdgar E. Iglesias2018-05-291-6/+10
* target-microblaze: Convert env_btarget to i64Edgar E. Iglesias2018-05-293-15/+25
* target-microblaze: Remove argument b in eval_cc()Edgar E. Iglesias2018-05-291-3/+3
* target-microblaze: Use table based condition-codes conversionEdgar E. Iglesias2018-05-291-21/+20Star
* target-microblaze: mmu: Cleanup debug log messagesEdgar E. Iglesias2018-05-291-20/+19Star
* target-microblaze: Simplify address computation using tcg_gen_addi_i32()Edgar E. Iglesias2018-05-291-6/+1Star
* target-microblaze: Allow address sizes between 32 and 64 bitsEdgar E. Iglesias2018-05-291-3/+2Star
* target-microblaze: Add support for extended access to TLBLOEdgar E. Iglesias2018-05-295-18/+35
* target-microblaze: dec_msr: Plug a temp leakEdgar E. Iglesias2018-05-291-4/+9
* target-microblaze: mmu: Add a configurable output address maskEdgar E. Iglesias2018-05-293-0/+3
* target-microblaze: mmu: Prepare for 64-bit addressesEdgar E. Iglesias2018-05-292-10/+10
* target-microblaze: mmu: Remove unused register stateEdgar E. Iglesias2018-05-292-3/+6
* target-microblaze: mmu: Add R_TBLX_MISS macrosEdgar E. Iglesias2018-05-292-2/+7
* target-microblaze: Implement MFSE EAREdgar E. Iglesias2018-05-291-1/+8
* target-microblaze: Add Extended AddressingEdgar E. Iglesias2018-05-293-13/+62
* target-microblaze: Setup for 64bit addressingEdgar E. Iglesias2018-05-291-3/+3
* target-microblaze: Make special registers 64-bitEdgar E. Iglesias2018-05-295-58/+70
* target-microblaze: dec_msr: Fix MTS to FSREdgar E. Iglesias2018-05-291-3/+1Star
* target-microblaze: dec_msr: Reuse more code when reg-decodingEdgar E. Iglesias2018-05-291-29/+9Star
* target-microblaze: dec_msr: Use bool and extract32Edgar E. Iglesias2018-05-291-6/+9
* target-microblaze: Break out trap_illegal()Edgar E. Iglesias2018-05-291-48/+27Star
* target-microblaze: Break out trap_userspace()Edgar E. Iglesias2018-05-291-49/+27Star
* target-microblaze: Name special registers we supportEdgar E. Iglesias2018-05-291-2/+2
* target-microblaze: Use TCGv for load/store addressesEdgar E. Iglesias2018-05-294-42/+53
* target-microblaze: Remove pointer indirection for ld/st addressesEdgar E. Iglesias2018-05-291-12/+12
* target-microblaze: Make compute_ldst_addr always use a tempEdgar E. Iglesias2018-05-291-74/+37Star
* target-microblaze: Bypass MMU with MMU_NOMMU_IDXEdgar E. Iglesias2018-05-291-1/+2
* target-microblaze: Conditionalize setting of PVR11_USE_MMUEdgar E. Iglesias2018-05-291-1/+2
* target-microblaze: Remove USE_MMU PVR checksEdgar E. Iglesias2018-05-291-11/+1Star
* target-microblaze: Tighten up TCGv_i32 vs TCGv type usageEdgar E. Iglesias2018-05-292-288/+295
* target-microblaze: Correct the PVR array sizeEdgar E. Iglesias2018-05-291-1/+1
* target-microblaze: Correct special register array sizesEdgar E. Iglesias2018-05-292-5/+4Star
* target-microblaze: Fallback to our latest CPU versionEdgar E. Iglesias2018-05-291-2/+7
* target-microblaze: compute_ldst_addr: Use bool instead of intEdgar E. Iglesias2018-05-291-5/+5
* target-microblaze: dec_store: Use bool instead of unsigned intEdgar E. Iglesias2018-05-291-3/+4
* target-microblaze: dec_load: Use bool instead of unsigned intEdgar E. Iglesias2018-05-291-3/+4
* target/microblaze: avoid integer overflow in next_page PC checkEmilio G. Cota2018-05-091-3/+3
* target-microblaze: mmu: Make the TLBX MISS bit read-onlyEdgar E. Iglesias2018-04-301-0/+4
* target-microblaze: mmu: Make TLBSX write-onlyEdgar E. Iglesias2018-04-301-1/+4
* target-microblaze: Don't clobber the IMM reg for ld/st reversedEdgar E. Iglesias2018-04-301-2/+0Star
* target-microblaze: Fix trap checks for FPU insnsEdgar E. Iglesias2018-04-301-1/+1
* target-microblaze: Respect MSR.PVR as read-onlyEdgar E. Iglesias2018-04-301-1/+1
* cpu: get rid of unused cpu_init() definesIgor Mammedov2018-03-191-1/+0Star
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