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path: root/src/arch/riscv/prefix
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* [riscv] Allow for poisoning .bss section before early initialisationMichael Brown2025-07-301-0/+51
* [riscv] Create coherent DMA mapping of 32-bit address space on demandMichael Brown2025-07-111-28/+0Star
* [riscv] Create coherent DMA mapping for low 4GB of address spaceMichael Brown2025-07-041-2/+30
* [riscv] Construct invariant portions of page table outside the loopMichael Brown2025-07-041-48/+49
* [riscv] Write SBI console output to early UART, if enabledMichael Brown2025-06-121-0/+26
* [riscv] Support T-Head CPUs using non-standard Memory Attribute ExtensionMichael Brown2025-06-021-7/+59
* [riscv] Do not set executable bit in early UART page mappingMichael Brown2025-06-021-1/+1
* [riscv] Add fences around early UART writesMichael Brown2025-06-021-0/+2
* [riscv] Zero SATP after any failed attempt to enable pagingMichael Brown2025-06-021-5/+7
* [riscv] Add support for a SiFive-compatible early UARTMichael Brown2025-05-271-2/+33
* [riscv] Support mapping early UARTs outside of the identity mapMichael Brown2025-05-271-4/+48
* [riscv] Add support for writing prefix debug messages direct to a UARTMichael Brown2025-05-271-0/+79
* [riscv] Create macros for writing characters to the debug consoleMichael Brown2025-05-271-17/+62
* [riscv] Include carriage returns in libprefix.S debug messagesMichael Brown2025-05-261-8/+8
* [riscv] Support older SBI implementationsMichael Brown2025-05-251-6/+34
* [fdtmem] Update to use the generic system memory map APIMichael Brown2025-05-161-2/+2
* [fdtmem] Record size of accessible physical address spaceMichael Brown2025-05-141-0/+1
* [riscv] Perform a writability test before applying relocationsMichael Brown2025-05-131-8/+37
* [riscv] Avoid potentially overwriting the scratch area during relocationMichael Brown2025-05-131-5/+18
* [riscv] Add a .lkrn build target resembling a Linux kernel binaryMichael Brown2025-05-132-0/+130
* [riscv] Relocate to a safe physical address on startupMichael Brown2025-05-122-64/+215
* [riscv] Construct page tables based on link-time virtual addressesMichael Brown2025-05-121-3/+13
* [riscv] Allow apply_relocs() to use non-inline relocation recordsMichael Brown2025-05-122-10/+12
* [riscv] Return accessible physical address space size from enable_paging()Michael Brown2025-05-121-2/+20
* [fdtmem] Add ability to parse FDT memory map for a relocation addressMichael Brown2025-05-111-0/+8
* [riscv] Ensure that prefix_virt is aligned on an xlen boundaryMichael Brown2025-05-111-0/+1
* [riscv] Hold virtual address offset in the thread pointer registerMichael Brown2025-05-112-81/+80Star
* [riscv] Use load and store pseudo-instructions where possibleMichael Brown2025-05-092-10/+5Star
* [riscv] Add support for disabling 64-bit and 32-bit pagingMichael Brown2025-05-081-0/+137
* [riscv] Return virtual address offset from enable_paging()Michael Brown2025-05-081-52/+58
* [riscv] Restore temporarily modified PTE within 32-bit transition codeMichael Brown2025-05-081-9/+8Star
* [uaccess] Generalise librm's virt_offset mechanism for RISC-VMichael Brown2025-05-081-0/+7
* [riscv] Add debug printing of hexadecimal values in libprefix.SMichael Brown2025-05-071-1/+93
* [riscv] Move prefix system reset code to libprefix.SMichael Brown2025-05-072-16/+43
* [riscv] Add basic debug progress messages in libprefix.SMichael Brown2025-05-071-0/+32
* [riscv] Provide a millicode variant of print_message()Michael Brown2025-05-072-20/+38
* [riscv] Move prefix debug message printing to libprefix.SMichael Brown2025-05-062-12/+65
* [riscv] Place prefix debug strings in .rodataMichael Brown2025-05-061-1/+1
* [riscv] Use compressed relocation recordsMichael Brown2025-05-062-53/+71
* [riscv] Add support for enabling 32-bit pagingMichael Brown2025-05-041-17/+141
* [riscv] Add support for enabling 64-bit pagingMichael Brown2025-05-021-0/+262
* [riscv] Split out runtime relocator to libprefix.SMichael Brown2025-05-012-28/+105
* [fdt] Allow for parsing device trees where the length is known in advanceMichael Brown2025-03-281-0/+1
* [fdt] Allow for the existence of multiple device treesMichael Brown2025-03-281-2/+3
* [sbi] Add support for running as a RISC-V SBI payloadMichael Brown2024-10-281-0/+156
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