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path: root/drivers/pci/controller
Commit message (Expand)AuthorAgeFilesLines
* Merge branch 'pci/trivial'Bjorn Helgaas2019-07-136-6/+6
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| * PCI: Fix typos and whitespace errorsBjorn Helgaas2019-07-096-6/+6
* | Merge branch 'remotes/lorenzo/pci/xilinx'Bjorn Helgaas2019-07-131-6/+5Star
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| * | PCI: xilinx-nwl: Fix Multi MSI data programmingBharat Kumar Gogada2019-06-261-6/+5Star
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* | Merge branch 'remotes/lorenzo/pci/tegra'Bjorn Helgaas2019-07-131-82/+507
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| * | PCI: tegra: Enable Relaxed Ordering only for Tegra20 & Tegra30Vidya Sagar2019-07-051-2/+5
| * | PCI: tegra: Change link retry log level to debugManikanta Maddireddy2019-07-051-1/+1
| * | PCI: tegra: Add support for GPIO based PERST#Manikanta Maddireddy2019-07-051-6/+43
| * | PCI: tegra: Put PEX CLK & BIAS pads in DPD modeManikanta Maddireddy2019-06-201-1/+12
| * | PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of SoC structManikanta Maddireddy2019-06-201-2/+5
| * | PCI: tegra: Change PRSNT_SENSE IRQ log to debugManikanta Maddireddy2019-06-201-1/+1
| * | PCI: tegra: Program AFI_CACHE_BAR_{0,1}_{ST,SZ} registers only for Tegra20Manikanta Maddireddy2019-06-201-5/+13
| * | PCI: tegra: Fix PLLE power down issue due to CLKREQ# signalManikanta Maddireddy2019-06-201-1/+12
| * | PCI: tegra: Set target speed as Gen1 before starting LTSSMManikanta Maddireddy2019-06-201-0/+11
| * | PCI: tegra: Update flow control timer frequency in Tegra210Manikanta Maddireddy2019-06-201-0/+15
| * | PCI: tegra: Add SW fixup for RAW violationsManikanta Maddireddy2019-06-201-0/+34
| * | PCI: tegra: Increase the deskew retry timeManikanta Maddireddy2019-06-201-0/+30
| * | PCI: tegra: Enable PCIe xclk clock clampingManikanta Maddireddy2019-06-201-2/+28
| * | PCI: tegra: Process pending DLL transactions before entering L1 or L2Manikanta Maddireddy2019-06-201-0/+11
| * | PCI: tegra: Disable AFI dynamic clock gatingManikanta Maddireddy2019-06-201-2/+4
| * | PCI: tegra: Enable opportunistic UpdateFC and ACKManikanta Maddireddy2019-06-201-1/+9
| * | PCI: tegra: Program UPHY electrical settings for Tegra210Manikanta Maddireddy2019-06-201-0/+107
| * | PCI: tegra: Advertise PCIe Advanced Error Reporting (AER) capabilityManikanta Maddireddy2019-06-201-0/+15
| * | PCI: tegra: Add PCIe Gen2 link speed supportManikanta Maddireddy2019-06-201-0/+64
| * | PCI: tegra: Fix PCIe host power up sequenceManikanta Maddireddy2019-06-201-22/+30
| * | PCI: tegra: Mask AFI_INTR in runtime suspendManikanta Maddireddy2019-06-201-0/+15
| * | PCI: tegra: Rearrange Tegra PCIe driver functionsManikanta Maddireddy2019-06-201-40/+30Star
| * | PCI: tegra: Handle failure cases in tegra_pcie_power_on()Manikanta Maddireddy2019-06-201-5/+21
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* | Merge branch 'remotes/lorenzo/pci/qcom'Bjorn Helgaas2019-07-131-61/+54Star
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| * | PCI: qcom: Ensure that PERST is asserted for at least 100 msNiklas Cassel2019-05-301-0/+2
| * | PCI: qcom: Add QCS404 PCIe controller supportBjorn Andersson2019-05-291-26/+38
| * | PCI: qcom: Use clk bulk API for 2.4.0 controllersBjorn Andersson2019-05-291-37/+16Star
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* | Merge branch 'remotes/lorenzo/pci/mobiveil'Bjorn Helgaas2019-07-131-213/+312
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| * | PCI: mobiveil: Fix INTx interrupt clearing in mobiveil_pcie_isr()Hou Zhiqiang2019-07-081-3/+2Star
| * | PCI: mobiveil: Fix infinite-loop in the INTx handling functionHou Zhiqiang2019-07-081-3/+9
| * | PCI: mobiveil: Move PCIe PIO enablement out of inbound window routineHou Zhiqiang2019-07-081-4/+5
| * | PCI: mobiveil: Add upper 32-bit PCI base address setup in inbound windowHou Zhiqiang2019-07-081-3/+6
| * | PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound windowHou Zhiqiang2019-07-081-1/+4
| * | PCI: mobiveil: Mask out hardcoded bits in inbound/outbound windows setupHou Zhiqiang2019-07-081-2/+2
| * | PCI: mobiveil: Clear the control fields before updating itHou Zhiqiang2019-07-081-5/+12
| * | PCI: mobiveil: Add configured inbound windows counterHou Zhiqiang2019-07-081-0/+1
| * | PCI: mobiveil: Fix the valid check for inbound and outbound windowsHou Zhiqiang2019-07-081-2/+2
| * | PCI: mobiveil: Clean-up program_{ib/ob}_windows()Hou Zhiqiang2019-07-081-17/+8Star
| * | PCI: mobiveil: Remove an unnecessary return value checkHou Zhiqiang2019-07-081-2/+0Star
| * | PCI: mobiveil: Fix error return valuesHou Zhiqiang2019-07-081-3/+3
| * | PCI: mobiveil: Refactor the MEM/IO outbound window initializationHou Zhiqiang2019-07-081-10/+10
| * | PCI: mobiveil: Make some register updates more readableHou Zhiqiang2019-07-081-18/+25
| * | PCI: mobiveil: Reformat the code for readabilityHou Zhiqiang2019-07-081-101/+107
| * | PCI: mobiveil: Fix devfn check in mobiveil_pcie_valid_device()Hou Zhiqiang2019-07-081-1/+1
| * | PCI: mobiveil: Initialize Primary/Secondary/Subordinate bus numbersHou Zhiqiang2019-07-081-0/+6
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