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path: root/target-arm/helper.c
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* semihosting: create SemihostingConfig structure and semihost.hLeon Alrae2015-06-191-3/+4
* target-arm: Implement PMSAv7 MPUPeter Crosthwaite2015-06-191-1/+173
* target-arm: Add registers for PMSAv7Peter Crosthwaite2015-06-191-7/+83
* target-arm/helper.c: define MPUIR registerPeter Crosthwaite2015-06-191-0/+10
* target-arm: Do not reset sysregs marked as ALIASSergey Fedorov2015-06-191-19/+9Star
* arm: helper: rename get_phys_addr_mpuPeter Crosthwaite2015-06-151-5/+5
* arm: Implement uniprocessor with MP configPeter Crosthwaite2015-06-151-2/+4
* arm: Refactor get_phys_addr FSR return mechanismPeter Crosthwaite2015-06-151-58/+70
* arm: helper: Factor out CP regs common to [pv]msaPeter Crosthwaite2015-06-151-9/+14
* arm: Don't add v7mp registers in MPU systemsPeter Crosthwaite2015-06-151-1/+2
* arm: Do not define TLBTR in PMSA systemsPeter Crosthwaite2015-06-151-3/+10
* target-arm: Use the kernel's idea of MPIDR if we're using KVMPavel Fedin2015-06-151-6/+3Star
* target-arm: add AArch32 MIDR aliases in ARMv8Sergey Fedorov2015-06-151-3/+7
* target-arm: Fix REVIDR reset valueSergey Fedorov2015-06-151-3/+2Star
* target-arm: use extended address bits from supersection short descriptorSergey Fedorov2015-06-151-0/+2
* target-arm: Handle "extended small page" descriptors correctlyPeter Maydell2015-06-151-4/+9
* target-arm: Remove v8_ prefix from names of non-v8-specific cpreg arraysPeter Maydell2015-06-021-4/+4
* Revert "target-arm: Avoid g_hash_table_get_keys()"Markus Armbruster2015-06-021-10/+2Star
* target-arm: Add TLBI_VAE2{IS}Edgar E. Iglesias2015-06-021-0/+8
* target-arm: Add TLBI_ALLE2Edgar E. Iglesias2015-06-021-0/+4
* target-arm: Add TLBI_ALLE1{IS}Edgar E. Iglesias2015-06-021-0/+8
* target-arm: Add TTBR0_EL2Edgar E. Iglesias2015-06-021-0/+14
* target-arm: Add TPIDR_EL2Edgar E. Iglesias2015-06-021-0/+7
* target-arm: Add SCTLR_EL2Edgar E. Iglesias2015-06-021-0/+7
* target-arm: Add TCR_EL2Edgar E. Iglesias2015-06-021-0/+8
* target-arm: Add MAIR_EL2Edgar E. Iglesias2015-06-021-0/+15
* target-arm: Break down TLB_LOCKDOWNEdgar E. Iglesias2015-06-021-12/+18
* target-arm: Add AArch64 CPTR registersGreg Bellows2015-05-291-1/+39
* target-arm: Update interrupt handling to use target ELGreg Bellows2015-05-291-37/+4Star
* target-arm: Move setting of exception info into tlb_fillPeter Maydell2015-05-291-40/+7Star
* target-arm: Remove unneeded '+'Edgar E. Iglesias2015-05-181-1/+1
* target-arm: Correct accessfn for CNTV_TVAL_EL0Edgar E. Iglesias2015-05-181-0/+1
* target-arm: Correct accessfn for CNTP_{CT}VAL_EL0Edgar E. Iglesias2015-05-181-1/+2
* target-arm: Add EL3 and EL2 TCR checkingGreg Bellows2015-05-181-13/+32
* target-arm: Add TTBR regime function and useGreg Bellows2015-05-181-5/+19
* tcg: Push merged memop+mmu_idx parameter to softmmu routinesRichard Henderson2015-05-141-4/+6
* Allow ARMv8 SCR.SMD updatesGreg Bellows2015-04-261-1/+3
* target-arm: rename c1_coproc to cpacr_el1Sergey Fedorov2015-04-261-2/+2
* target-arm: Add user-mode transaction attributePeter Maydell2015-04-261-0/+1
* target-arm: Use correct memory attributes for page table walksPeter Maydell2015-04-261-9/+40
* target-arm: Honour NS bits in page tablesPeter Maydell2015-04-261-12/+67
* target-arm: Store SPSR_EL1 state in banked_spsr[1] (SPSR_svc)Peter Maydell2015-04-011-1/+1
* target-arm: Ignore low bit of PC in M-profile exception returnPeter Maydell2015-03-161-0/+10
* target-arm: get_phys_addr_lpae: more xn controlAndrew Jones2015-03-161-30/+100
* target-arm: fix get_phys_addr_v6/SCTLR_AFE access checkAndrew Jones2015-03-161-7/+42
* target-arm: convert check_ap to ap_to_rw_protAndrew Jones2015-03-161-30/+19Star
* target-arm: Add 32/64-bit register syncGreg Bellows2015-02-131-0/+211
* target-arm: fix for exponent comparison in recpe_f64Ildar Isaev2015-02-051-1/+1
* target-arm: Fix brace style in reindented codePeter Maydell2015-02-051-13/+23
* target-arm: Reindent ancient page-table-walk codePeter Maydell2015-02-051-96/+96
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