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* target-mips: optimize gen_compute_branch()aurel322009-03-291-1/+1
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6936 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: rename helpers from do_ to helper_aurel322009-03-081-8/+8
| | | | | | Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6773 c046a42c-6fe2-441c-8c8c-71466251a162
* The _exit syscall is used for both thread termination in NPTL applications,pbrook2009-03-071-1/+2
| | | | | | | | | | | | | and process termination in legacy applications. Try to guess which we want based on the presence of multiple threads. Also implement locking when modifying the CPU list. Signed-off-by: Paul Brook <paul@codesourcery.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6735 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix remaining compiler warnings for mips targets.ths2008-12-201-1/+18
| | | | | | | Signed-off-by: Stefan Weil <weil@mail.berlios.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6111 c046a42c-6fe2-441c-8c8c-71466251a162
* Refactor translation block CPU state handling (Jan Kiszka)aliguori2008-11-181-0/+8
| | | | | | | | | | | | | | | This patch refactors the way the CPU state is handled that is associated with a TB. The basic motivation is to move more arch specific code out of generic files. Specifically the long #ifdef clutter in tb_find_fast() has to be overcome in order to avoid duplicating it for the gdb watchpoint fixes (patch "Restore pc on watchpoint hits"). Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
* Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)aliguori2008-11-181-5/+7
| | | | | | | | | | | as macros should be avoided when possible. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
* target-mips: optimize gen_op_addr_add() (2/2)aurel322008-11-111-6/+7
| | | | | | | | | Instead of dynamically generating different code depending on the UX flag, add a new flag in ctx->flags to generate different code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5677 c046a42c-6fe2-441c-8c8c-71466251a162
* Show size for unassigned accesses (Robert Reif)blueswir12008-10-061-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
* Move the active FPU registers into env again, and use more TCG registersths2008-09-181-4/+7
| | | | | | | | | to access them. Signed-off-by: Thiemo Seufer <ths@networkno.de> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
* Less hardcoding of TARGET_USER_ONLY.ths2008-07-231-8/+1Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4928 c046a42c-6fe2-441c-8c8c-71466251a162
* Use temporary registers for the MIPS FPU emulation.ths2008-07-091-7/+1Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162
* Move interrupt_request and user_mode_only to common cpu state.pbrook2008-07-011-2/+0Star
| | | | | | | | Save and restore env->interrupt_request and env->halted. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
* Move CPU save/load registration to common code.pbrook2008-06-301-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
* Add instruction counter.pbrook2008-06-291-0/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
* More efficient target register / TC accesses.ths2008-06-271-37/+40
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4794 c046a42c-6fe2-441c-8c8c-71466251a162
* Remove remaining uses of T0 in the MIPS target.ths2008-06-241-3/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4788 c046a42c-6fe2-441c-8c8c-71466251a162
* T1 is now dead.ths2008-06-241-1/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4787 c046a42c-6fe2-441c-8c8c-71466251a162
* Move FP TNs to cpu env.ths2008-06-111-5/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4728 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix typo.pbrook2008-05-301-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
* Move clone() register setup to target specific code. Handle fork-like clone.pbrook2008-05-301-0/+10
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
* Push common interrupt variables to cpu-defs.h (Glauber Costa)bellard2008-05-291-2/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
* moved halted field to CPU_COMMONbellard2008-05-281-2/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
* Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford.ths2008-05-281-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4604 c046a42c-6fe2-441c-8c8c-71466251a162
* Use TCG for MIPS GPR moves.ths2008-05-061-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4356 c046a42c-6fe2-441c-8c8c-71466251a162
* Simplify mips branch handling. Retire T2 from use. Use TCG for branches.ths2008-05-041-1/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4320 c046a42c-6fe2-441c-8c8c-71466251a162
* Make MIPS MT implementation more cache friendly.ths2008-02-121-4/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3981 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS COP1X (and related) instructions, by Richard Sandiford.ths2007-12-301-7/+11
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3877 c046a42c-6fe2-441c-8c8c-71466251a162
* De-cruft exception definitions, and implement nicer debug output.ths2007-12-261-15/+12Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3861 c046a42c-6fe2-441c-8c8c-71466251a162
* Improved PABITS handling, and config register fixes.ths2007-12-251-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3855 c046a42c-6fe2-441c-8c8c-71466251a162
* added cpu_model parameter to cpu_init()bellard2007-11-101-4/+2Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
* Move kernel loader parameters from the cpu state to being board specific.ths2007-11-091-5/+0Star
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3557 c046a42c-6fe2-441c-8c8c-71466251a162
* Implement missing MIPS supervisor mode bits.ths2007-10-281-10/+16
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
* Handle IBE on MIPS properly.ths2007-10-201-0/+3
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
* Replace is_user variable with mmu_idx in softmmu core,j_mayer2007-10-141-0/+11
| | | | | | | | | | | | | | allowing support of more than 2 mmu access modes. Add backward compatibility is_user variable in targets code when needed. Implement per target cpu_mmu_index function, avoiding duplicated code and #ifdef TARGET_xxx in softmmu core functions. Implement per target mmu modes definitions. As an example, add PowerPC hypervisor mode definition and Alpha executive and kernel modes definitions. Optimize PowerPC case, precomputing mmu_idx when MSR register changes and using the same definition in code translation code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
* Unify '-cpu ?' option.j_mayer2007-10-121-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
* Move get_sp_from_cpustate from cpu.h to target_signal.h.ths2007-09-271-5/+0Star
| | | | | | | Enable sigaltstack processing for more architectures. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
* linux-user sigaltstack() syscall, by Thayne Harbaugh.ths2007-09-271-0/+5
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
* Optimise instructions accessing CP0, by Aurelien Jarno.ths2007-09-251-9/+10
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3235 c046a42c-6fe2-441c-8c8c-71466251a162
* Per-CPU instruction decoding implementation, by Aurelien Jarno.ths2007-09-241-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
* Partial support for 34K multithreading, not functional yet.ths2007-09-061-41/+198
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
* Handle MIPS64 SEGBITS value correctly.ths2007-06-231-0/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
* Move target-specific defines to the target directories.ths2007-06-031-0/+6
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
* Don't kill the registered irqs on reset.ths2007-05-311-3/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2903 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix CPU (re-)selection on reset.ths2007-05-301-1/+4
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
* Fix usermode check, thanks Aurelien Jarno.ths2007-05-291-1/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2897 c046a42c-6fe2-441c-8c8c-71466251a162
* Don't check the FPU state for each FPU instruction, use hflags toths2007-05-291-3/+5
| | | | | | | handle this per-tb. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
* Handle PX/UX status flags correctly, by Aurelien Jarno.ths2007-05-281-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2892 c046a42c-6fe2-441c-8c8c-71466251a162
* The 24k wants more watch and srsmap registers.ths2007-05-231-2/+2
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2849 c046a42c-6fe2-441c-8c8c-71466251a162
* - Move FPU exception handling into helper functions, since they are big.ths2007-05-181-3/+3
| | | | | | | | | - Fix FP-conditional branches. - Check FPU register mode at runtime, not translation time, as the F64 status bit can change. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
* MIPS linux-user update.ths2007-05-131-0/+1
| | | | git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2810 c046a42c-6fe2-441c-8c8c-71466251a162
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