Commit message (Expand) | Author | Age | Files | Lines | ||
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* | tcg: Pass generic CPUState to gen_intermediate_code() | LluĂs Vilanova | 2017-07-19 | 1 | -3/+2 | |
* | Merge remote-tracking branch 'remotes/xtensa/tags/20170124-xtensa' into staging | Peter Maydell | 2017-01-25 | 1 | -78/+167 | |
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| * | target-xtensa: implement RER/WER instructions | Max Filippov | 2017-01-17 | 1 | -2/+10 | |
| * | target/xtensa: implement MEMCTL SR | Max Filippov | 2017-01-15 | 1 | -0/+8 | |
| * | target/xtensa: don't continue translation after exception | Max Filippov | 2017-01-15 | 1 | -1/+4 | |
| * | target/xtensa: support icount | Max Filippov | 2017-01-15 | 1 | -45/+134 | |
| * | target/xtensa: refactor CCOUNT/CCOMPARE | Max Filippov | 2017-01-15 | 1 | -31/+12 | |
* | | target-xtensa: Use clrsb helper | Richard Henderson | 2017-01-10 | 1 | -10/+1 | |
* | | target-xtensa: Use clz opcode | Richard Henderson | 2017-01-10 | 1 | -2/+11 | |
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* | Move target-* CPU file into a target/ folder | Thomas Huth | 2016-12-20 | 1 | -0/+3225 |