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* target/riscv: cpu: Remove compile time XLEN checksAlistair Francis2020-12-181-9/+10
* target/riscv: Specify the XLEN for CPUsAlistair Francis2020-12-181-10/+23
* target/riscv: Add a riscv_cpu_is_32bit() helper functionAlistair Francis2020-12-182-0/+11
* target/riscv: fpu_helper: Match function defs in HELPER macrosAlistair Francis2020-12-182-24/+8Star
* target/riscv: Add a TYPE_RISCV_CPU_BASE CPUAlistair Francis2020-12-181-0/+6
* target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSRAlex Richardson2020-12-181-2/+2
* target/riscv: Fix the bug of HLVX/HLV/HSVYifei Jiang2020-12-181-1/+2
* i386: tcg: remove inline from cpu_load_eflagsClaudio Fontana2020-12-162-13/+15
* i386: move TCG cpu class initialization to tcg/Claudio Fontana2020-12-1619-148/+238
* x86/cpu: Add AVX512_FP16 cpu featureCathy Zhang2020-12-162-1/+3
* i386: move hyperv_limits initialization to x86_cpu_realizefn()Vitaly Kuznetsov2020-12-163-1/+18
* i386: move hyperv_version_id initialization to x86_cpu_realizefn()Vitaly Kuznetsov2020-12-163-2/+17
* i386: move hyperv_interface_id initialization to x86_cpu_realizefn()Vitaly Kuznetsov2020-12-163-6/+19
* i386: move hyperv_vendor_id initialization to x86_cpu_realizefn()Vitaly Kuznetsov2020-12-163-17/+34
* i386: move cpu dump out of helper.c into cpu-dump.cClaudio Fontana2020-12-164-514/+539
* i386: move TCG accel files into tcg/Claudio Fontana2020-12-1616-13/+14
* i386: move hax accel files into hax/Claudio Fontana2020-12-1612-10/+11
* i386: move whpx accel files into whpx/Claudio Fontana2020-12-167-5/+6
* i386: move kvm accel files into kvm/Claudio Fontana2020-12-1616-14/+17
* Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201215'...Peter Maydell2020-12-155-4/+70
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| * target/nios2: Use deposit32() to update ipending registerPeter Maydell2020-12-151-2/+1Star
| * target/nios2: Move nios2_check_interrupts() into target/nios2Peter Maydell2020-12-152-2/+9
| * target/nios2: Move IIC code into CPU object properPeter Maydell2020-12-152-1/+30
| * target/openrisc: Move pic_cpu code into CPU object properPeter Maydell2020-12-152-1/+32
* | Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request...Peter Maydell2020-12-153-34/+28Star
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| * sparc: Check dev->realized at sparc_set_nwindows()Eduardo Habkost2020-12-151-0/+6
| * arm/cpu64: Register "aarch64" as class propertyEduardo Habkost2020-12-151-10/+6Star
| * i386: Register feature bit properties as class propertiesEduardo Habkost2020-12-151-24/+16Star
* | Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pul...Peter Maydell2020-12-141-3/+3
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| * | target/i386: tracing: format length values as hexDov Murik2020-12-131-3/+3
* | | Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20201213' into ...Peter Maydell2020-12-1412-354/+408
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| * | target/mips: Use FloatRoundMode enum for FCR31 modes conversionPhilippe Mathieu-Daudé2020-12-132-2/+3
| * | target/mips: Remove unused headers from fpu_helper.cPhilippe Mathieu-Daudé2020-12-131-4/+0Star
| * | target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn()Philippe Mathieu-Daudé2020-12-131-12/+8Star
| * | target/mips: Move cpu definitions, reset() and realize() to cpu.cPhilippe Mathieu-Daudé2020-12-133-244/+243Star
| * | target/mips: Move mips_cpu_add_definition() from helper.c to cpu.cPhilippe Mathieu-Daudé2020-12-132-33/+33
| * | target/mips: Extract cpu_supports*/cpu_set* translate.cPhilippe Mathieu-Daudé2020-12-132-18/+18
| * | target/mips: Do not initialize MT registers if MT ASE absentPhilippe Mathieu-Daudé2020-12-131-0/+4
| * | target/mips: Introduce ase_mt_available() helperPhilippe Mathieu-Daudé2020-12-135-4/+11
| * | target/mips: Remove mips_def_t unused argument from mvp_init()Philippe Mathieu-Daudé2020-12-132-2/+2
| * | target/mips: Remove unused headers from op_helper.cPhilippe Mathieu-Daudé2020-12-131-4/+0Star
| * | target/mips: Remove unused headers from translate.cPhilippe Mathieu-Daudé2020-12-131-2/+0Star
| * | hw/mips: Move address translation helpers to target/mips/Philippe Mathieu-Daudé2020-12-134-2/+60
| * | target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argumentPhilippe Mathieu-Daudé2020-12-132-0/+6
| * | target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT()Philippe Mathieu-Daudé2020-12-132-4/+4
| * | target/mips: Explicit Release 6 MMU typesPhilippe Mathieu-Daudé2020-12-131-4/+5
| * | target/mips: Allow executing MSA instructions on Loongson-3A4000Philippe Mathieu-Daudé2020-12-131-2/+2
| * | target/mips: Also display exception names in user-modePhilippe Mathieu-Daudé2020-12-131-11/+14
| * | target/mips: Remove unused headers from cp0_helper.cPhilippe Mathieu-Daudé2020-12-131-3/+1Star
| * | target/mips: Do not include CP0 helpers in user-mode emulationPhilippe Mathieu-Daudé2020-12-132-5/+1Star
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