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Experimental fork of QEMU with video encoding patches
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Commit message (
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Author
Age
Files
Lines
*
target/arm: Add is_secure parameter to get_phys_addr_pmsav5
Richard Henderson
2022-09-22
1
-2
/
+2
*
target/arm: Add secure parameter to get_phys_addr_pmsav7
Richard Henderson
2022-09-22
1
-3
/
+2
*
target/arm: Add is_secure parameter to pmsav7_use_background_region
Richard Henderson
2022-09-22
1
-5
/
+5
*
target/arm: Add secure parameter to get_phys_addr_pmsav8
Richard Henderson
2022-09-22
1
-3
/
+2
*
target/arm: Add is_secure parameter to get_phys_addr_v6
Richard Henderson
2022-09-22
1
-6
/
+5
*
target/arm: Add is_secure parameter to get_phys_addr_v5
Richard Henderson
2022-09-22
1
-7
/
+7
*
target/arm: Add secure parameter to pmsav8_mpu_lookup
Richard Henderson
2022-09-22
3
-7
/
+6
*
target/arm: Add is_secure parameter to v8m_security_lookup
Richard Henderson
2022-09-22
3
-8
/
+12
*
target/arm: Remove is_subpage argument to pmsav8_mpu_lookup
Richard Henderson
2022-09-22
3
-15
/
+15
*
target/arm: Use GetPhysAddrResult in pmsav8_mpu_lookup
Richard Henderson
2022-09-22
3
-26
/
+21
*
target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav8
Richard Henderson
2022-09-22
1
-14
/
+14
*
target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav7
Richard Henderson
2022-09-22
1
-19
/
+17
*
target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav5
Richard Henderson
2022-09-22
1
-12
/
+12
*
target/arm: Use GetPhysAddrResult in get_phys_addr_v5
Richard Henderson
2022-09-22
1
-14
/
+11
*
target/arm: Use GetPhysAddrResult in get_phys_addr_v6
Richard Henderson
2022-09-22
1
-16
/
+14
*
target/arm: Use GetPhysAddrResult in get_phys_addr_lpae
Richard Henderson
2022-09-22
1
-43
/
+26
*
target/arm: Create GetPhysAddrResult
Richard Henderson
2022-09-22
5
-125
/
+109
*
target/arm: Fix alignment for VLD4.32
Clément Chigot
2022-09-22
1
-1
/
+5
*
Merge tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k ...
Stefan Hajnoczi
2022-09-21
5
-89
/
+118
|
\
|
*
target/m68k: always call gen_exit_tb() after writes to SR
Mark Cave-Ayland
2022-09-21
1
-0
/
+4
|
*
target/m68k: rename M68K_FEATURE_M68000 to M68K_FEATURE_M68K
Mark Cave-Ayland
2022-09-21
5
-74
/
+75
|
*
target/m68k: Perform writback before modifying SR
Richard Henderson
2022-09-21
1
-3
/
+5
|
*
target/m68k: Fix MACSR to CCR
Richard Henderson
2022-09-21
1
-2
/
+4
|
*
target/m68k: Implement atomic test-and-set
Richard Henderson
2022-09-21
1
-10
/
+30
*
|
Merge tag 'pull-ppc-20220920' of https://gitlab.com/danielhb/qemu into staging
Stefan Hajnoczi
2022-09-21
12
-81
/
+272
|
\
\
|
*
|
target/ppc: Clear fpstatus flags on helpers missing it
Víctor Colombo
2022-09-20
1
-11
/
+26
|
*
|
target/ppc: Zero second doubleword of VSR registers for FPR insns
Víctor Colombo
2022-09-20
1
-0
/
+8
|
*
|
target/ppc: Set OV32 when OV is set
Víctor Colombo
2022-09-20
1
-2
/
+2
|
*
|
target/ppc: Zero second doubleword for VSX madd instructions
Víctor Colombo
2022-09-20
1
-1
/
+1
|
*
|
target/ppc: Set result to QNaN for DENBCD when VXCVI occurs
Víctor Colombo
2022-09-20
1
-2
/
+24
|
*
|
target/ppc: Zero second doubleword in DFP instructions
Víctor Colombo
2022-09-20
1
-1
/
+4
|
*
|
target/ppc: Remove unused xer_* macros
Víctor Colombo
2022-09-20
1
-4
/
+0
|
*
|
target/ppc: Remove extra space from s128 field in ppc_vsr_t
Víctor Colombo
2022-09-20
1
-1
/
+1
|
*
|
target/ppc: Merge fsqrt and fsqrts helpers
Víctor Colombo
2022-09-20
3
-26
/
+17
|
*
|
target/ppc: Move fsqrts to decodetree
Víctor Colombo
2022-09-20
3
-23
/
+2
|
*
|
target/ppc: Move fsqrt to decodetree
Víctor Colombo
2022-09-20
3
-13
/
+24
|
*
|
target/ppc: Implement hashstp and hashchkp
Víctor Colombo
2022-09-20
4
-0
/
+8
|
*
|
target/ppc: Implement hashst and hashchk
Víctor Colombo
2022-09-20
5
-0
/
+128
|
*
|
target/ppc: Add HASHKEYR and HASHPKEYR SPRs
Víctor Colombo
2022-09-20
2
-0
/
+30
|
|
/
*
|
target/i386: introduce insn_get_addr
Paolo Bonzini
2022-09-19
1
-10
/
+26
*
|
target/i386: REPZ and REPNZ are mutually exclusive
Paolo Bonzini
2022-09-19
1
-0
/
+2
*
|
target/i386: fix INSERTQ implementation
Paolo Bonzini
2022-09-19
3
-8
/
+18
*
|
target/i386: correctly mask SSE4a bit indices in register operands
Paolo Bonzini
2022-09-19
1
-2
/
+2
*
|
target/i386: Raise #GP on unaligned m128 accesses when required.
Paolo Bonzini
2022-09-18
6
-29
/
+72
|
/
*
Merge tag 'pull-semi-20220914' of https://gitlab.com/rth7680/qemu into staging
Stefan Hajnoczi
2022-09-17
14
-520
/
+182
|
\
|
*
target/riscv: Honour -semihosting-config userspace=on and enable=on
Peter Maydell
2022-09-13
3
-7
/
+6
|
*
target/xtensa: Honour -semihosting-config userspace=on
Peter Maydell
2022-09-13
1
-3
/
+4
|
*
target/nios2: Honour -semihosting-config userspace=on
Peter Maydell
2022-09-13
1
-1
/
+2
|
*
target/mips: Honour -semihosting-config userspace=on
Peter Maydell
2022-09-13
4
-10
/
+11
|
*
target/m68k: Honour -semihosting-config userspace=on
Peter Maydell
2022-09-13
1
-2
/
+1
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