| Commit message (Expand) | Author | Age | Files | Lines |
* | target/riscv: cpu_helper: Remove compile time XLEN checks | Alistair Francis | 2020-12-18 | 1 | -5/+7 |
* | target/riscv: cpu: Remove compile time XLEN checks | Alistair Francis | 2020-12-18 | 1 | -9/+10 |
* | target/riscv: Specify the XLEN for CPUs | Alistair Francis | 2020-12-18 | 1 | -10/+23 |
* | target/riscv: Add a riscv_cpu_is_32bit() helper function | Alistair Francis | 2020-12-18 | 2 | -0/+11 |
* | target/riscv: fpu_helper: Match function defs in HELPER macros | Alistair Francis | 2020-12-18 | 2 | -24/+8 |
* | target/riscv: Add a TYPE_RISCV_CPU_BASE CPU | Alistair Francis | 2020-12-18 | 1 | -0/+6 |
* | target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR | Alex Richardson | 2020-12-18 | 1 | -2/+2 |
* | target/riscv: Fix the bug of HLVX/HLV/HSV | Yifei Jiang | 2020-12-18 | 1 | -1/+2 |
* | i386: tcg: remove inline from cpu_load_eflags | Claudio Fontana | 2020-12-16 | 2 | -13/+15 |
* | i386: move TCG cpu class initialization to tcg/ | Claudio Fontana | 2020-12-16 | 19 | -148/+238 |
* | x86/cpu: Add AVX512_FP16 cpu feature | Cathy Zhang | 2020-12-16 | 2 | -1/+3 |
* | i386: move hyperv_limits initialization to x86_cpu_realizefn() | Vitaly Kuznetsov | 2020-12-16 | 3 | -1/+18 |
* | i386: move hyperv_version_id initialization to x86_cpu_realizefn() | Vitaly Kuznetsov | 2020-12-16 | 3 | -2/+17 |
* | i386: move hyperv_interface_id initialization to x86_cpu_realizefn() | Vitaly Kuznetsov | 2020-12-16 | 3 | -6/+19 |
* | i386: move hyperv_vendor_id initialization to x86_cpu_realizefn() | Vitaly Kuznetsov | 2020-12-16 | 3 | -17/+34 |
* | i386: move cpu dump out of helper.c into cpu-dump.c | Claudio Fontana | 2020-12-16 | 4 | -514/+539 |
* | i386: move TCG accel files into tcg/ | Claudio Fontana | 2020-12-16 | 16 | -13/+14 |
* | i386: move hax accel files into hax/ | Claudio Fontana | 2020-12-16 | 12 | -10/+11 |
* | i386: move whpx accel files into whpx/ | Claudio Fontana | 2020-12-16 | 7 | -5/+6 |
* | i386: move kvm accel files into kvm/ | Claudio Fontana | 2020-12-16 | 16 | -14/+17 |
* | Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201215'... | Peter Maydell | 2020-12-15 | 5 | -4/+70 |
|\ |
|
| * | target/nios2: Use deposit32() to update ipending register | Peter Maydell | 2020-12-15 | 1 | -2/+1 |
| * | target/nios2: Move nios2_check_interrupts() into target/nios2 | Peter Maydell | 2020-12-15 | 2 | -2/+9 |
| * | target/nios2: Move IIC code into CPU object proper | Peter Maydell | 2020-12-15 | 2 | -1/+30 |
| * | target/openrisc: Move pic_cpu code into CPU object proper | Peter Maydell | 2020-12-15 | 2 | -1/+32 |
* | | Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request... | Peter Maydell | 2020-12-15 | 3 | -34/+28 |
|\ \
| |/
|/| |
|
| * | sparc: Check dev->realized at sparc_set_nwindows() | Eduardo Habkost | 2020-12-15 | 1 | -0/+6 |
| * | arm/cpu64: Register "aarch64" as class property | Eduardo Habkost | 2020-12-15 | 1 | -10/+6 |
| * | i386: Register feature bit properties as class properties | Eduardo Habkost | 2020-12-15 | 1 | -24/+16 |
* | | Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pul... | Peter Maydell | 2020-12-14 | 1 | -3/+3 |
|\ \ |
|
| * | | target/i386: tracing: format length values as hex | Dov Murik | 2020-12-13 | 1 | -3/+3 |
* | | | Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20201213' into ... | Peter Maydell | 2020-12-14 | 12 | -354/+408 |
|\ \ \
| |_|/
|/| | |
|
| * | | target/mips: Use FloatRoundMode enum for FCR31 modes conversion | Philippe Mathieu-Daudé | 2020-12-13 | 2 | -2/+3 |
| * | | target/mips: Remove unused headers from fpu_helper.c | Philippe Mathieu-Daudé | 2020-12-13 | 1 | -4/+0 |
| * | | target/mips: Inline cpu_mips_realize_env() in mips_cpu_realizefn() | Philippe Mathieu-Daudé | 2020-12-13 | 1 | -12/+8 |
| * | | target/mips: Move cpu definitions, reset() and realize() to cpu.c | Philippe Mathieu-Daudé | 2020-12-13 | 3 | -244/+243 |
| * | | target/mips: Move mips_cpu_add_definition() from helper.c to cpu.c | Philippe Mathieu-Daudé | 2020-12-13 | 2 | -33/+33 |
| * | | target/mips: Extract cpu_supports*/cpu_set* translate.c | Philippe Mathieu-Daudé | 2020-12-13 | 2 | -18/+18 |
| * | | target/mips: Do not initialize MT registers if MT ASE absent | Philippe Mathieu-Daudé | 2020-12-13 | 1 | -0/+4 |
| * | | target/mips: Introduce ase_mt_available() helper | Philippe Mathieu-Daudé | 2020-12-13 | 5 | -4/+11 |
| * | | target/mips: Remove mips_def_t unused argument from mvp_init() | Philippe Mathieu-Daudé | 2020-12-13 | 2 | -2/+2 |
| * | | target/mips: Remove unused headers from op_helper.c | Philippe Mathieu-Daudé | 2020-12-13 | 1 | -4/+0 |
| * | | target/mips: Remove unused headers from translate.c | Philippe Mathieu-Daudé | 2020-12-13 | 1 | -2/+0 |
| * | | hw/mips: Move address translation helpers to target/mips/ | Philippe Mathieu-Daudé | 2020-12-13 | 4 | -2/+60 |
| * | | target/mips: Introduce cpu_supports_isa() taking CPUMIPSState argument | Philippe Mathieu-Daudé | 2020-12-13 | 2 | -0/+6 |
| * | | target/mips: Rename cpu_supports_FEAT() as cpu_type_supports_FEAT() | Philippe Mathieu-Daudé | 2020-12-13 | 2 | -4/+4 |
| * | | target/mips: Explicit Release 6 MMU types | Philippe Mathieu-Daudé | 2020-12-13 | 1 | -4/+5 |
| * | | target/mips: Allow executing MSA instructions on Loongson-3A4000 | Philippe Mathieu-Daudé | 2020-12-13 | 1 | -2/+2 |
| * | | target/mips: Also display exception names in user-mode | Philippe Mathieu-Daudé | 2020-12-13 | 1 | -11/+14 |
| * | | target/mips: Remove unused headers from cp0_helper.c | Philippe Mathieu-Daudé | 2020-12-13 | 1 | -3/+1 |