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Commit message (
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Author
Age
Files
Lines
*
[riscv] Create coherent DMA mapping of 32-bit address space on demand
Michael Brown
2025-07-11
1
-6
/
+1
*
[riscv] Invalidate data cache on completed RX DMA buffers
Michael Brown
2025-07-10
1
-11
/
+0
*
[riscv] Provide a DMA API implementation for RISC-V bare-metal systems
Michael Brown
2025-07-09
3
-3
/
+66
*
[riscv] Support explicit cache management operations on I/O buffers
Michael Brown
2025-07-07
1
-0
/
+17
*
[riscv] Add support for detecting T-Head vendor extensions
Michael Brown
2025-07-07
2
-0
/
+25
*
[riscv] Serialise MMIO accesses with respect to each other
Michael Brown
2025-06-22
1
-4
/
+8
*
[riscv] Maximise barrier effects of memory fences
Michael Brown
2025-06-12
1
-1
/
+1
*
[riscv] Support mapping I/O devices outside of the identity map
Michael Brown
2025-05-26
1
-0
/
+26
*
[riscv] Support older SBI implementations
Michael Brown
2025-05-25
1
-6
/
+48
*
[riscv] Use generic external heap based on the system memory map
Michael Brown
2025-05-19
1
-18
/
+0
*
[riscv] Check if seed CSR is accessible from S-mode
Michael Brown
2024-10-29
1
-0
/
+75
*
[sbi] Add support for running as a RISC-V SBI payload
Michael Brown
2024-10-28
2
-0
/
+37
*
[riscv] Add support for checking CPU extensions reported via device tree
Michael Brown
2024-10-28
1
-0
/
+16
*
[riscv] Add support for reboot and power off via SBI
Michael Brown
2024-10-22
2
-0
/
+28
*
[riscv] Add support for the SBI debug console
Michael Brown
2024-10-22
1
-0
/
+157
*
[riscv] Add support for the RISC-V CPU architecture
Michael Brown
2024-09-15
1
-0
/
+137