summaryrefslogtreecommitdiffstats
path: root/target/arm
Commit message (Expand)AuthorAgeFilesLines
* Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.0-pul...Peter Maydell2021-03-112-2/+2
|\
| * sysemu: Let VMChangeStateHandler take boolean 'running' argumentPhilippe Mathieu-Daudé2021-03-092-2/+2
* | Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xen-upda...Peter Maydell2021-03-114-6/+6
|\ \
| * | semihosting: Move include/hw/semihosting/ -> include/semihosting/Philippe Mathieu-Daudé2021-03-104-6/+6
| |/
* / target/arm: Restrict v7A TCG cpus to TCG accelPhilippe Mathieu-Daudé2021-03-082-335/+318Star
|/
* target/arm/cpu: Update coding style to make checkpatch.pl happyPhilippe Mathieu-Daudé2021-03-051-4/+8
* target/arm: Restrict v8M IDAU to TCGPhilippe Mathieu-Daudé2021-03-052-7/+8
* target/arm: Use TCF0 and TFSRE0 for unprivileged tag checksPeter Collingbourne2021-03-052-5/+10
* target/arm: Speed up aarch64 TBL/TBXRichard Henderson2021-03-054-84/+56Star
* target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPURebecca Cran2021-03-051-0/+4
* target/arm: Enable FEAT_SSBS for "max" AARCH64 CPURebecca Cran2021-03-051-0/+5
* target/arm: Add support for FEAT_SSBS, Speculative Store Bypass SafeRebecca Cran2021-03-054-1/+69
* exec: Move TranslationBlock typedef to qemu/typedefs.hRichard Henderson2021-02-181-2/+1Star
* Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell2021-02-171-0/+5
|\
| * sev/i386: Don't allow a system reset under an SEV-ES guestTom Lendacky2021-02-161-0/+5
* | target/arm: Enable MTE for user-onlyRichard Henderson2021-02-161-0/+15
* | target/arm: Add allocation tag storage for user modeRichard Henderson2021-02-161-2/+27
* | linux-user/aarch64: Signal SEGV_MTEAERR for async tag check errorRichard Henderson2021-02-161-0/+10
* | linux-user/aarch64: Pass syndrome to EXC_*_ABORTRichard Henderson2021-02-161-6/+9
* | target/arm: Split out syndrome.h from internals.hRichard Henderson2021-02-162-244/+274
* | linux-user/aarch64: Implement PROT_MTERichard Henderson2021-02-161-0/+1
* | target/arm: Use the proper TBI settings for linux-userRichard Henderson2021-02-162-9/+5Star
* | target/arm: Improve gen_top_byte_ignoreRichard Henderson2021-02-161-11/+14
* | linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLERichard Henderson2021-02-162-0/+34
* | exec: Use cpu_untagged_addr in g2h; split out g2h_untaggedRichard Henderson2021-02-161-2/+2
|/
* target/arm: Correctly initialize MDCR_EL2.HPMNDaniel Müller2021-02-111-5/+4Star
* target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPURebecca Cran2021-02-111-0/+4
* target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPURebecca Cran2021-02-111-0/+5
* target/arm: Support AA32 DIT by moving PSTATE_SS from cpsr into env->pstateRebecca Cran2021-02-113-18/+42
* target/arm: Add support for FEAT_DIT, Data Independent TimingRebecca Cran2021-02-114-0/+52
* target/arm: Fix SCR RES1 handlingMike Nawrocki2021-02-112-2/+19
* target/arm: Don't migrate CPUARMState.featuresAaron Lindsay2021-02-111-1/+1
* cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClassClaudio Fontana2021-02-054-24/+58
* cpu: move debug_check_watchpoint to tcg_opsClaudio Fontana2021-02-051-2/+2
* cpu: move adjust_watchpoint_address to tcg_opsClaudio Fontana2021-02-051-1/+1
* cpu: move do_unaligned_access to tcg_opsClaudio Fontana2021-02-051-1/+1
* cpu: move cc->transaction_failed to tcg_opsClaudio Fontana2021-02-051-2/+2
* cpu: move cc->do_interrupt to tcg_opsClaudio Fontana2021-02-052-7/+6Star
* target/arm: do not use cc->do_interrupt for KVM directlyClaudio Fontana2021-02-052-4/+6
* cpu: Move debug_excp_handler to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move tlb_fill to tcg_opsEduardo Habkost2021-02-051-1/+1
* cpu: Move cpu_exec_* to tcg_opsEduardo Habkost2021-02-053-3/+11
* cpu: Move synchronize_from_tb() to tcg_opsEduardo Habkost2021-02-051-1/+3
* cpu: Introduce TCGCpuOperations structEduardo Habkost2021-02-051-1/+1
* target/arm: Replace magic value by MMU_DATA_LOAD definitionPhilippe Mathieu-Daudé2021-01-291-1/+1
* target/arm: Conditionalize DBGDIDRRichard Henderson2021-01-291-6/+15
* target/arm: Implement ID_PFR2Richard Henderson2021-01-293-2/+5
* target/arm/m_helper: Silence GCC 10 maybe-uninitialized errorPhilippe Mathieu-Daudé2021-01-191-1/+1
* target/arm: Update REV, PUNPK for pred_descRichard Henderson2021-01-192-13/+8Star
* target/arm: Update ZIP, UZP, TRN for pred_descRichard Henderson2021-01-192-17/+13Star
generated by cgit v1.2.3-55-g7522 (git 2.39.0) at 2024-12-18 11:55:23 +0100