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path: root/target/riscv/internals.h
Commit message (Expand)AuthorAgeFilesLines
* target/riscv: rvv: Add mask agnostic for vv instructionsYueh-Ting (eop) Chen2022-09-071-2/+3
* target/riscv: rvv: Add tail agnostic for vx, vvm, vxm instructionseopXD2022-06-101-2/+3
* target/riscv: rvv: Add tail agnostic for vv instructionseopXD2022-06-101-2/+3
* target/riscv: add support for zhinx/zhinxminWeiwei Li2022-03-031-3/+13
* target/riscv: add support for zfinxWeiwei Li2022-03-031-3/+13
* target/riscv: add "set round to odd" rounding mode helper functionFrank Chang2021-12-201-0/+1
* target/riscv: introduce floating-point rounding mode enumFrank Chang2021-12-201-0/+9
* target/riscv: rvv-1.0: floating-point scalar move instructionsFrank Chang2021-12-201-5/+0Star
* target/riscv: rvv-1.0: remove MLEN calculationsFrank Chang2021-12-201-5/+4Star
* target/riscv: zfh: half-precision computationalKito Cheng2021-12-201-0/+16
* target/riscv: Add basic vmstate description of CPUYifei Jiang2020-11-031-0/+4
* target/riscv: Check nanboxed inputs to fp helpersRichard Henderson2020-08-221-0/+11
* target/riscv: Generate nanboxed results from fp helpersRichard Henderson2020-08-221-0/+5
* target/riscv: integer scalar move instructionLIU Zhiwei2020-07-021-0/+6
* target/riscv: vector floating-point classify instructionsLIU Zhiwei2020-07-021-0/+5
* target/riscv: add vector amo operationsLIU Zhiwei2020-07-021-0/+1
* target/riscv: add vector stride load and store instructionsLIU Zhiwei2020-07-021-0/+5
* target/riscv: add an internals.h headerLIU Zhiwei2020-07-021-0/+24
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