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| * target/arm: Use GetPhysAddrResult in get_phys_addr_pmsav5Richard Henderson2022-09-221-12/+12
| * target/arm: Use GetPhysAddrResult in get_phys_addr_v5Richard Henderson2022-09-221-14/+11Star
| * target/arm: Use GetPhysAddrResult in get_phys_addr_v6Richard Henderson2022-09-221-16/+14Star
| * target/arm: Use GetPhysAddrResult in get_phys_addr_lpaeRichard Henderson2022-09-221-43/+26Star
| * target/arm: Create GetPhysAddrResultRichard Henderson2022-09-225-125/+109Star
| * target/arm: Fix alignment for VLD4.32Clément Chigot2022-09-221-1/+5
* | Merge tag 'pull-hex-20220919' of https://github.com/quic/qemu into stagingStefan Hajnoczi2022-09-221-23/+0Star
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| * Hexagon (target/hexagon) remove unused encodingsTaylor Simpson2022-09-191-23/+0Star
* | Merge tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k ...Stefan Hajnoczi2022-09-215-89/+118
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| * | target/m68k: always call gen_exit_tb() after writes to SRMark Cave-Ayland2022-09-211-0/+4
| * | target/m68k: rename M68K_FEATURE_M68000 to M68K_FEATURE_M68KMark Cave-Ayland2022-09-215-74/+75
| * | target/m68k: Perform writback before modifying SRRichard Henderson2022-09-211-3/+5
| * | target/m68k: Fix MACSR to CCRRichard Henderson2022-09-211-2/+4
| * | target/m68k: Implement atomic test-and-setRichard Henderson2022-09-211-10/+30
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* | Merge tag 'pull-ppc-20220920' of https://gitlab.com/danielhb/qemu into stagingStefan Hajnoczi2022-09-2112-81/+272
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| * | target/ppc: Clear fpstatus flags on helpers missing itVíctor Colombo2022-09-201-11/+26
| * | target/ppc: Zero second doubleword of VSR registers for FPR insnsVíctor Colombo2022-09-201-0/+8
| * | target/ppc: Set OV32 when OV is setVíctor Colombo2022-09-201-2/+2
| * | target/ppc: Zero second doubleword for VSX madd instructionsVíctor Colombo2022-09-201-1/+1
| * | target/ppc: Set result to QNaN for DENBCD when VXCVI occursVíctor Colombo2022-09-201-2/+24
| * | target/ppc: Zero second doubleword in DFP instructionsVíctor Colombo2022-09-201-1/+4
| * | target/ppc: Remove unused xer_* macrosVíctor Colombo2022-09-201-4/+0Star
| * | target/ppc: Remove extra space from s128 field in ppc_vsr_tVíctor Colombo2022-09-201-1/+1
| * | target/ppc: Merge fsqrt and fsqrts helpersVíctor Colombo2022-09-203-26/+17Star
| * | target/ppc: Move fsqrts to decodetreeVíctor Colombo2022-09-203-23/+2Star
| * | target/ppc: Move fsqrt to decodetreeVíctor Colombo2022-09-203-13/+24
| * | target/ppc: Implement hashstp and hashchkpVíctor Colombo2022-09-204-0/+8
| * | target/ppc: Implement hashst and hashchkVíctor Colombo2022-09-205-0/+128
| * | target/ppc: Add HASHKEYR and HASHPKEYR SPRsVíctor Colombo2022-09-202-0/+30
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* | target/i386: introduce insn_get_addrPaolo Bonzini2022-09-191-10/+26
* | target/i386: REPZ and REPNZ are mutually exclusivePaolo Bonzini2022-09-191-0/+2
* | target/i386: fix INSERTQ implementationPaolo Bonzini2022-09-193-8/+18
* | target/i386: correctly mask SSE4a bit indices in register operandsPaolo Bonzini2022-09-191-2/+2
* | target/i386: Raise #GP on unaligned m128 accesses when required.Paolo Bonzini2022-09-186-29/+72
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* Merge tag 'pull-semi-20220914' of https://gitlab.com/rth7680/qemu into stagingStefan Hajnoczi2022-09-1714-520/+182Star
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| * target/riscv: Honour -semihosting-config userspace=on and enable=onPeter Maydell2022-09-133-7/+6Star
| * target/xtensa: Honour -semihosting-config userspace=onPeter Maydell2022-09-131-3/+4
| * target/nios2: Honour -semihosting-config userspace=onPeter Maydell2022-09-131-1/+2
| * target/mips: Honour -semihosting-config userspace=onPeter Maydell2022-09-134-10/+11
| * target/m68k: Honour -semihosting-config userspace=onPeter Maydell2022-09-131-2/+1Star
| * target/arm: Honour -semihosting-config userspace=onPeter Maydell2022-09-132-23/+5Star
| * semihosting: Allow optional use of semihosting from userspacePeter Maydell2022-09-135-9/+9
| * target/m68k: Convert semihosting errno to gdb remote errnoRichard Henderson2022-09-131-2/+31
| * target/m68k: Use semihosting/syscalls.hRichard Henderson2022-09-131-232/+49Star
| * target/nios2: Convert semihosting errno to gdb remote errnoRichard Henderson2022-09-131-2/+31
| * target/nios2: Use semihosting/syscalls.hRichard Henderson2022-09-131-246/+50Star
* | target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max'Peter Maydell2022-09-142-2/+2
* | target/arm: Support 64-bit event counters for FEAT_PMUv3p5Peter Maydell2022-09-143-9/+57
* | target/arm: Implement FEAT_PMUv3p5 cycle counter disable bitsPeter Maydell2022-09-142-4/+37
* | target/arm: Rename pmu_8_n feature test functionsPeter Maydell2022-09-142-17/+17
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