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Experimental fork of QEMU with video encoding patches
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target-tricore
/
tricore-opcodes.h
Commit message (
Expand
)
Author
Age
Files
Lines
*
target-tricore: Add FPU infrastructure
Bastian Koppelmann
2016-03-23
1
-0
/
+18
*
target-tricore: add RR_DIV and RR_DIV_U instructions of the v1.6 ISA
Bastian Koppelmann
2015-05-22
1
-0
/
+2
*
target-tricore: add FRET instructions of the v1.6 ISA
Bastian Koppelmann
2015-05-22
1
-0
/
+2
*
target-tricore: add FCALL instructions of the v1.6 ISA
Bastian Koppelmann
2015-05-22
1
-0
/
+3
*
target-tricore: add SYS_RESTORE instruction of the v1.6 ISA
Bastian Koppelmann
2015-05-22
1
-0
/
+1
*
target-tricore: add RR_CRC32 instruction of the v1.6.1 ISA
Bastian Koppelmann
2015-05-22
1
-0
/
+1
*
target-tricore: add SWAPMSK instructions of the v1.6.1 ISA
Bastian Koppelmann
2015-05-22
1
-0
/
+5
*
target-tricore: add CMPSWP instructions of the v1.6.1 ISA
Bastian Koppelmann
2015-05-22
1
-0
/
+5
*
target-tricore: fix BO_OFF10_SEXT calculating the wrong offset
Bastian Koppelmann
2015-05-11
1
-1
/
+1
*
target-tricore: Add instructions of RRR1 opcode format, which have 0xe3 as fi...
Bastian Koppelmann
2015-03-16
1
-2
/
+2
*
target-tricore: Add instructions of RRR1 opcode format, which have 0x63 as fi...
Bastian Koppelmann
2015-03-16
1
-2
/
+2
*
target-tricore: Add instructions of RRR1 opcode format, which have 0xa3 as fi...
Bastian Koppelmann
2015-03-16
1
-24
/
+24
*
target-tricore: Add instructions of RRR1 opcode format, which have 0x43 as fi...
Bastian Koppelmann
2015-03-03
1
-4
/
+4
*
target-tricore: Add instructions of RRR2 opcode format
Bastian Koppelmann
2015-03-03
1
-1
/
+1
*
target-tricore: Add instructions of RRR opcode format
Bastian Koppelmann
2015-01-27
1
-1
/
+1
*
target-tricore: Fix new typos
Stefan Weil
2015-01-15
1
-2
/
+2
*
target-tricore: Fix MFCR/MTCR insn and B format offset.
Bastian Koppelmann
2014-12-21
1
-0
/
+2
*
target-tricore: Add missing 1.6 insn of BOL opcode format
Bastian Koppelmann
2014-12-21
1
-0
/
+6
*
target-tricore: Add instructions of RR opcode format, that have 0x4b as the f...
Bastian Koppelmann
2014-12-21
1
-1
/
+1
*
target-tricore: Add instructions of RR opcode format, that have 0xb as the fi...
Bastian Koppelmann
2014-12-21
1
-2
/
+2
*
target-tricore: add missing 64-bit MOV in RLC format
Alex Zuepke
2014-12-21
1
-0
/
+1
*
target-tricore: typo in BOL format
Alex Zuepke
2014-12-21
1
-1
/
+1
*
target-tricore: fix offset masking in BOL format
Alex Zuepke
2014-12-21
1
-1
/
+1
*
target-tricore: Add instructions of RCR opcode format
Bastian Koppelmann
2014-12-10
1
-1
/
+2
*
target-tricore: Add instructions of RLC opcode format
Bastian Koppelmann
2014-12-10
1
-0
/
+1
*
target-tricore: Add instructions of RC opcode format
Bastian Koppelmann
2014-12-10
1
-0
/
+1
*
target-tricore: Add instructions of BRR opcode format
Bastian Koppelmann
2014-12-10
1
-0
/
+1
*
target-tricore: Add instructions of BRN opcode format
Bastian Koppelmann
2014-12-10
1
-0
/
+1
*
target-tricore: Add instructions of BRC opcode format
Bastian Koppelmann
2014-12-10
1
-2
/
+4
*
target-tricore: Add instructions of BOL opcode format
Bastian Koppelmann
2014-12-10
1
-1
/
+3
*
target-tricore: Add instructions of BO opcode format
Bastian Koppelmann
2014-10-20
1
-0
/
+2
*
target-tricore: Cleanup and Bugfixes
Bastian Koppelmann
2014-10-20
1
-1
/
+1
*
target-tricore: Add masks and opcodes for decoding
Bastian Koppelmann
2014-09-01
1
-0
/
+1406
