summaryrefslogtreecommitdiffstats
path: root/target-arm/cpu.h
Commit message (Expand)AuthorAgeFilesLines
* target-arm: Add isread parameter to CPAccessFnsPeter Maydell2016-02-111-1/+3
* target-arm: Update arm_generate_debug_exceptions() to handle EL2/EL3Peter Maydell2016-02-111-5/+43
* target-arm: Implement MDCR_EL3 and SDCRPeter Maydell2016-02-111-0/+1
* target-arm: Fix typo in comment in arm_is_secure_below_el3()Peter Maydell2016-02-111-1/+1
* target-arm: Properly support EL2 and EL3 in arm_el_is_aa64()Peter Maydell2016-01-211-9/+24
* target-arm: Support multiple address spaces in page table walksPeter Maydell2016-01-211-0/+9
* target-arm: Implement asidx_from_attrsPeter Maydell2016-01-211-0/+8
* target-arm: Add QOM property for Secure memory regionPeter Maydell2016-01-211-0/+6
* target-arm: Add HPFAR_EL2Edgar E. Iglesias2015-10-271-0/+1
* target-arm: Fix "no 64-bit EL2" assumption in arm_excp_unmasked()Peter Maydell2015-10-271-30/+52
* target-arm: implement arm_debug_target_el()Sergey Fedorov2015-10-161-1/+16
* target-arm: Add MDCR_EL2Sergey Fedorov2015-10-161-0/+1
* target-arm: Implement AArch64 OSLAR/OSLSR_EL1 sysregsDavorin Mista2015-10-161-0/+1
* target-arm: Avoid calling arm_el_is_aa64() function for unimplemented ELSergey Sorokin2015-10-161-3/+8
* target-*: Drop cpu_gen_code defineRichard Henderson2015-10-071-1/+0Star
* target-arm: Add condexec state to insn_startRichard Henderson2015-10-071-0/+1
* arm: Remove ELF_MACHINE from cpu.hPeter Crosthwaite2015-09-251-2/+0Star
* target-arm: Add VMPIDR_EL2Edgar E. Iglesias2015-09-141-0/+1
* target-arm: Add VPIDR_EL2Edgar E. Iglesias2015-09-141-0/+1
* target-arm: Add VTTBR_EL2Edgar E. Iglesias2015-09-141-0/+1
* target-arm: Add VTCR_EL2Edgar E. Iglesias2015-09-141-0/+1
* tlb: Add "ifetch" argument to cpu_mmu_index()Benjamin Herrenschmidt2015-09-111-2/+2
* typofixes - v4Veres Lajos2015-09-111-2/+2
* maint: remove / fix many doubled wordsDaniel P. Berrange2015-09-111-2/+2
* target-arm: Fix arm_excp_unmasked() functionSergey Sorokin2015-09-071-3/+3
* target-arm: Wire up HLT 0xf000 as the A64 semihosting instructionPeter Maydell2015-09-071-0/+1
* target-arm/arm-semi.c: Support widening APIs to 64 bitsPeter Maydell2015-09-071-1/+1
* target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3Peter Maydell2015-08-251-0/+3
* target-arm: Add the AArch64 view of the Secure physical timerPeter Maydell2015-08-131-1/+2
* target-arm: Add debug check for mismatched cpreg resetsPeter Maydell2015-08-131-0/+3
* target-arm: Add the Hypervisor timerEdgar E. Iglesias2015-08-131-1/+2
* target-arm: Add CNTHCTL_EL2Edgar E. Iglesias2015-08-131-0/+1
* target-arm: Add CNTVOFF_EL2Edgar E. Iglesias2015-08-131-0/+1
* cpu-exec: Purge all uses of ENV_GET_CPU()Peter Crosthwaite2015-07-091-1/+1
* target-arm: Implement PMSAv7 MPUPeter Crosthwaite2015-06-191-0/+1
* target-arm: Add registers for PMSAv7Peter Crosthwaite2015-06-191-0/+10
* target-arm: Do not reset sysregs marked as ALIASSergey Fedorov2015-06-191-2/+2
* target-arm: Add the THUMB_DSP featureAurelio C. Remonda2015-06-151-0/+1
* target-arm/cpu.h: remove pending_exceptionAlex Bennée2015-06-151-1/+0Star
* target-arm: Move TB flags down to fill gapPeter Maydell2015-05-291-2/+2
* target-arm: Extend FP checks to use an ELGreg Bellows2015-05-291-22/+70
* target-arm: Make singlestate TB flags common between AArch32/64Peter Maydell2015-05-291-42/+27Star
* target-arm: Add AArch64 CPTR registersGreg Bellows2015-05-291-0/+5
* target-arm: Allow cp access functions to indicate traps to EL2 or EL3Peter Maydell2015-05-291-1/+5
* target-arm: Update interrupt handling to use target ELGreg Bellows2015-05-291-3/+4
* target-arm: Move setting of exception info into tlb_fillPeter Maydell2015-05-291-2/+0Star
* target-arm: Add exception target el infrastructureGreg Bellows2015-05-291-0/+1
* tcg: Delete unused cpu_pc_from_tb()Peter Crosthwaite2015-04-301-9/+0Star
* arm: cpu.h: Remove unused typdefsPeter Crosthwaite2015-04-301-5/+0Star
* target-arm: rename c1_coproc to cpacr_el1Sergey Fedorov2015-04-261-2/+2